InterpreterProcessOpCodeAsmJs.h 91 KB

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  1. //-------------------------------------------------------------------------------------------------------
  2. // Copyright (C) Microsoft Corporation and contributors. All rights reserved.
  3. // Licensed under the MIT license. See LICENSE.txt file in the project root for full license information.
  4. //-------------------------------------------------------------------------------------------------------
  5. #ifdef ASMJS_PLAT
  6. #define PROCESS_FALLTHROUGH_ASM(name, func) \
  7. case OpCodeAsmJs::name:
  8. #define PROCESS_FALLTHROUGH_ASM_COMMON(name, func, suffix) \
  9. case OpCodeAsmJs::name:
  10. #define PROCESS_READ_LAYOUT_ASMJS(name, layout, suffix) \
  11. CompileAssert(OpCodeInfoAsmJs<OpCodeAsmJs::name>::Layout == OpLayoutTypeAsmJs::layout); \
  12. const unaligned OpLayout##layout##suffix * playout = m_reader.layout##suffix(ip); \
  13. Assert((playout != nullptr) == (Js::OpLayoutTypeAsmJs::##layout != Js::OpLayoutTypeAsmJs::Empty)); // Make sure playout is used
  14. #define PROCESS_NOPASMJS_COMMON(name, layout, suffix) \
  15. case OpCodeAsmJs::name: \
  16. { \
  17. PROCESS_READ_LAYOUT_ASMJS(name, layout, suffix); \
  18. break; \
  19. }
  20. #define PROCESS_NOPASMJS(name, func) PROCESS_NOPASMJS_COMMON(name, func,)
  21. #define PROCESS_BR_ASM(name, func) \
  22. case OpCodeAsmJs::name: \
  23. { \
  24. PROCESS_READ_LAYOUT_ASMJS(name, AsmBr,); \
  25. ip = func(playout); \
  26. break; \
  27. }
  28. #define PROCESS_FUNCtoA1Mem_COMMON(name, func, suffix) \
  29. case OpCodeAsmJs::name: \
  30. { \
  31. PROCESS_READ_LAYOUT_ASMJS(name, AsmReg1, suffix); \
  32. SetReg(playout->R0, \
  33. func(GetScriptContext())); \
  34. break; \
  35. }
  36. #define PROCESS_FUNCtoA1Mem(name, func) PROCESS_FUNCtoA1Mem_COMMON(name, func,)
  37. #define PROCESS_CUSTOM_ASMJS_COMMON(name, func, layout, suffix) \
  38. case OpCodeAsmJs::name: \
  39. { \
  40. PROCESS_READ_LAYOUT_ASMJS(name, layout, suffix); \
  41. func(playout); \
  42. break; \
  43. }
  44. #define PROCESS_CUSTOM_ASMJS(name, func, layout) PROCESS_CUSTOM_ASMJS_COMMON(name, func, layout,)
  45. #define PROCESS_VtoI1Mem_COMMON(name, func, suffix) \
  46. case OpCodeAsmJs::name: \
  47. { \
  48. PROCESS_READ_LAYOUT_ASMJS(name, AsmReg1, suffix); \
  49. SetRegRawInt(playout->R0, \
  50. func()); \
  51. break; \
  52. }
  53. #define PROCESS_VtoI1Mem(name, func) PROCESS_VtoI1Mem_COMMON(name, func,)
  54. #define PROCESS_I2toI1Ctx_COMMON(name, func, suffix) \
  55. case OpCodeAsmJs::name: \
  56. { \
  57. PROCESS_READ_LAYOUT_ASMJS(name, Int3, suffix); \
  58. SetRegRawInt(playout->I0, \
  59. func(GetRegRawInt(playout->I1), GetRegRawInt(playout->I2), scriptContext)); \
  60. break; \
  61. }
  62. #define PROCESS_I2toI1Ctx(name, func) PROCESS_I2toI1Mem_COMMON(name, func,)
  63. #define PROCESS_I2toI1Mem_COMMON(name, func, suffix) \
  64. case OpCodeAsmJs::name: \
  65. { \
  66. PROCESS_READ_LAYOUT_ASMJS(name, Int3, suffix); \
  67. SetRegRawInt(playout->I0, \
  68. func(GetRegRawInt(playout->I1), GetRegRawInt(playout->I2))); \
  69. break; \
  70. }
  71. #define PROCESS_I2toI1Mem(name, func) PROCESS_I2toI1Mem_COMMON(name, func,)
  72. #define PROCESS_L2toL1Mem_COMMON(name, func, suffix) \
  73. case OpCodeAsmJs::name: \
  74. { \
  75. PROCESS_READ_LAYOUT_ASMJS(name, Long3, suffix); \
  76. SetRegRawInt64(playout->L0, \
  77. func(GetRegRawInt64(playout->L1), GetRegRawInt64(playout->L2))); \
  78. break; \
  79. }
  80. #define PROCESS_L2toL1Mem(name, func) PROCESS_L2toL1Mem_COMMON(name, func,)
  81. #define PROCESS_L2toL1Ctx_COMMON(name, func, suffix) \
  82. case OpCodeAsmJs::name: \
  83. { \
  84. PROCESS_READ_LAYOUT_ASMJS(name, Long3, suffix); \
  85. SetRegRawInt64(playout->L0, \
  86. func(GetRegRawInt64(playout->L1), GetRegRawInt64(playout->L2), scriptContext)); \
  87. break; \
  88. }
  89. #define PROCESS_L2toL1Ctx(name, func) PROCESS_L2toL1Ctx_COMMON(name, func,)
  90. #define PROCESS_I2toI1MemDConv_COMMON(name, func, suffix) \
  91. case OpCodeAsmJs::name: \
  92. { \
  93. PROCESS_READ_LAYOUT_ASMJS(name, Int3, suffix); \
  94. SetRegRawInt(playout->I0, \
  95. JavascriptConversion::ToInt32(\
  96. func((unsigned int)GetRegRawInt(playout->I1), (unsigned int)GetRegRawInt(playout->I2)))); \
  97. break; \
  98. }
  99. #define PROCESS_I2toI1MemDConv(name, func) PROCESS_I2toI1MemDConv_COMMON(name, func,)
  100. #define PROCESS_F2toF1Mem_COMMON(name, func, suffix) \
  101. case OpCodeAsmJs::name: \
  102. { \
  103. PROCESS_READ_LAYOUT_ASMJS(name, Float3, suffix); \
  104. SetRegRawFloat(playout->F0, \
  105. func(GetRegRawFloat(playout->F1), GetRegRawFloat(playout->F2))); \
  106. break; \
  107. }
  108. #define PROCESS_D2toD1Mem_COMMON(name, func, suffix) \
  109. case OpCodeAsmJs::name: \
  110. { \
  111. PROCESS_READ_LAYOUT_ASMJS(name, Double3, suffix); \
  112. SetRegRawDouble(playout->D0, \
  113. func(GetRegRawDouble(playout->D1), GetRegRawDouble(playout->D2))); \
  114. break; \
  115. }
  116. #define PROCESS_D2toD1Mem(name, func) PROCESS_D2toD1Mem_COMMON(name, func,)
  117. #define PROCESS_F2toF1Mem(name, func) PROCESS_F2toF1Mem_COMMON(name, func,)
  118. #define PROCESS_EMPTYASMJS(name, func) \
  119. case OpCodeAsmJs::name: \
  120. { \
  121. PROCESS_READ_LAYOUT_ASMJS(name, Empty, ); \
  122. func(); \
  123. break; \
  124. }
  125. #define PROCESS_I1toI1Mem_COMMON(name, func, suffix) \
  126. case OpCodeAsmJs::name: \
  127. { \
  128. PROCESS_READ_LAYOUT_ASMJS(name, Int2, suffix); \
  129. SetRegRawInt(playout->I0, \
  130. func(GetRegRawInt(playout->I1))); \
  131. break; \
  132. }
  133. #define PROCESS_I1toI1Mem(name, func) PROCESS_I1toI1Mem_COMMON(name, func,)
  134. #define PROCESS_L1toL1Mem_COMMON(name, func, suffix) \
  135. case OpCodeAsmJs::name: \
  136. { \
  137. PROCESS_READ_LAYOUT_ASMJS(name, Long2, suffix); \
  138. SetRegRawInt64(playout->L0, \
  139. func(GetRegRawInt64(playout->L1))); \
  140. break; \
  141. }
  142. #define PROCESS_L1toL1Mem(name, func) PROCESS_L1toL1Mem_COMMON(name, func,)
  143. #define PROCESS_I1toL1Mem_COMMON(name, func, suffix) \
  144. case OpCodeAsmJs::name: \
  145. { \
  146. PROCESS_READ_LAYOUT_ASMJS(name, Long1Int1, suffix); \
  147. SetRegRawInt64(playout->L0, \
  148. func(GetRegRawInt(playout->I1))); \
  149. break; \
  150. }
  151. #define PROCESS_U1toL1Mem_COMMON(name, func, suffix) \
  152. case OpCodeAsmJs::name: \
  153. { \
  154. PROCESS_READ_LAYOUT_ASMJS(name, Long1Int1, suffix); \
  155. SetRegRawInt64(playout->L0, \
  156. func((unsigned int)GetRegRawInt(playout->I1))); \
  157. break; \
  158. }
  159. #define PROCESS_L1toF1Mem_COMMON(name, func, suffix) \
  160. case OpCodeAsmJs::name: \
  161. { \
  162. PROCESS_READ_LAYOUT_ASMJS(name, Float1Long1, suffix); \
  163. SetRegRawFloat(playout->F0, \
  164. func(GetRegRawInt64(playout->L1))); \
  165. break; \
  166. }
  167. #define PROCESS_L1toD1Mem_COMMON(name, func, suffix) \
  168. case OpCodeAsmJs::name: \
  169. { \
  170. PROCESS_READ_LAYOUT_ASMJS(name, Double1Long1, suffix); \
  171. SetRegRawDouble(playout->D0, \
  172. func(GetRegRawInt64(playout->L1))); \
  173. break; \
  174. }
  175. #define PROCESS_D1toD1_COMMON(name, func, suffix) \
  176. case OpCodeAsmJs::name: \
  177. { \
  178. PROCESS_READ_LAYOUT_ASMJS(name, Double2, suffix); \
  179. SetRegRawDouble(playout->D0, \
  180. GetRegRawDouble(playout->D1)); \
  181. break; \
  182. }
  183. #define PROCESS_D1toD1(name, func) PROCESS_D1toD1_COMMON(name, func,)
  184. #define PROCESS_D1toD1Mem_COMMON(name, func, suffix) \
  185. case OpCodeAsmJs::name: \
  186. { \
  187. PROCESS_READ_LAYOUT_ASMJS(name, Double2, suffix); \
  188. SetRegRawDouble(playout->D0, \
  189. func(GetRegRawDouble(playout->D1))); \
  190. break; \
  191. }
  192. #define PROCESS_F1toF1Mem_COMMON(name, func, suffix) \
  193. case OpCodeAsmJs::name: \
  194. { \
  195. PROCESS_READ_LAYOUT_ASMJS(name, Float2, suffix); \
  196. SetRegRawFloat(playout->F0, \
  197. func(GetRegRawFloat(playout->F1))); \
  198. break; \
  199. }
  200. #define PROCESS_D1toF1Mem_COMMON(name, func, suffix) \
  201. case OpCodeAsmJs::name: \
  202. { \
  203. PROCESS_READ_LAYOUT_ASMJS(name, Float1Double1, suffix); \
  204. SetRegRawFloat(playout->F0, \
  205. func(GetRegRawDouble(playout->D1))); \
  206. break; \
  207. }
  208. #define PROCESS_I1toF1Mem_COMMON(name, func, suffix) \
  209. case OpCodeAsmJs::name: \
  210. { \
  211. PROCESS_READ_LAYOUT_ASMJS(name, Float1Int1, suffix); \
  212. SetRegRawFloat(playout->F0, \
  213. func(GetRegRawInt(playout->I1))); \
  214. break; \
  215. }
  216. #define PROCESS_D1toD1Mem(name, func) PROCESS_D1toD1Mem_COMMON(name, func,)
  217. #define PROCESS_F1toF1Mem(name, func) PROCESS_F1toF1Mem_COMMON(name, func,)
  218. #define PROCESS_D1toF1Mem(name, func) PROCESS_D1toF1Mem_COMMON(name, func,)
  219. #define PROCESS_I1toF1Mem(name, func) PROCESS_I1toF1Mem_COMMON(name, func,)
  220. #define PROCESS_IP_TARG_ASM_IMPL(name, func, layoutSize) \
  221. case OpCodeAsmJs::name: \
  222. { \
  223. Assert(!switchProfileMode); \
  224. ip = func<layoutSize, INTERPRETERPROFILE>(ip); \
  225. if (switchProfileMode) \
  226. { \
  227. m_reader.SetIP(ip); \
  228. return nullptr; \
  229. } \
  230. break; \
  231. }
  232. #define PROCESS_IP_TARG_ASM_COMMON(name, func, suffix) PROCESS_IP_TARG_ASM##suffix(name, func)
  233. #define PROCESS_IP_TARG_ASM_Large(name, func) PROCESS_IP_TARG_ASM_IMPL(name, func, Js::LargeLayout)
  234. #define PROCESS_IP_TARG_ASM_Medium(name, func) PROCESS_IP_TARG_ASM_IMPL(name, func, Js::MediumLayout)
  235. #define PROCESS_IP_TARG_ASM_Small(name, func) PROCESS_IP_TARG_ASM_IMPL(name, func, Js::SmallLayout)
  236. #define PROCESS_L1toI1Mem_COMMON(name, func, suffix) \
  237. case OpCodeAsmJs::name: \
  238. { \
  239. PROCESS_READ_LAYOUT_ASMJS(name, Int1Long1, suffix); \
  240. SetRegRawInt(playout->I0, \
  241. func(GetRegRawInt64(playout->L1))); \
  242. break; \
  243. }
  244. #define PROCESS_L1toI1Mem(name, func) PROCESS_L1toI1Mem_COMMON(name, func,)
  245. #define PROCESS_D1toI1Mem_COMMON(name, func, suffix) \
  246. case OpCodeAsmJs::name: \
  247. { \
  248. PROCESS_READ_LAYOUT_ASMJS(name, Int1Double1, suffix); \
  249. SetRegRawInt(playout->I0, \
  250. func(GetRegRawDouble(playout->D1))); \
  251. break; \
  252. }
  253. #define PROCESS_D1toI1Mem(name, func) PROCESS_D1toI1Mem_COMMON(name, func,)
  254. #define PROCESS_F1toI1Mem_COMMON(name, func, suffix) \
  255. case OpCodeAsmJs::name: \
  256. { \
  257. PROCESS_READ_LAYOUT_ASMJS(name, Int1Float1, suffix); \
  258. SetRegRawInt(playout->I0, \
  259. func(GetRegRawFloat(playout->F1))); \
  260. break; \
  261. }
  262. #define PROCESS_F1toI1Mem(name, func) PROCESS_F1toI1Mem_COMMON(name, func,)
  263. #define PROCESS_D1toL1Mem_COMMON(name, func, suffix) \
  264. case OpCodeAsmJs::name: \
  265. { \
  266. PROCESS_READ_LAYOUT_ASMJS(name, Long1Double1, suffix); \
  267. SetRegRawInt64(playout->L0, \
  268. func(GetRegRawDouble(playout->D1))); \
  269. break; \
  270. }
  271. #define PROCESS_D1toL1Mem(name, func) PROCESS_D1toL1Mem_COMMON(name, func,)
  272. #define PROCESS_L1toD1Mem_COMMON(name, func, suffix) \
  273. case OpCodeAsmJs::name: \
  274. { \
  275. PROCESS_READ_LAYOUT_ASMJS(name, Double1Long1, suffix); \
  276. SetRegRawDouble(playout->D0, \
  277. func(GetRegRawInt64(playout->L1))); \
  278. break; \
  279. }
  280. #define PROCESS_L1toD1Mem(name, func) PROCESS_L1toD1Mem_COMMON(name, func,)
  281. #define PROCESS_I1toD1Mem_COMMON(name, func, suffix) \
  282. case OpCodeAsmJs::name: \
  283. { \
  284. PROCESS_READ_LAYOUT_ASMJS(name, Double1Int1, suffix); \
  285. SetRegRawDouble(playout->D0, \
  286. func(GetRegRawInt(playout->I1))); \
  287. break; \
  288. }
  289. #define PROCESS_I1toD1Mem(name, func) PROCESS_I1toD1Mem_COMMON(name, func,)
  290. #define PROCESS_U1toD1Mem_COMMON(name, func, suffix) \
  291. case OpCodeAsmJs::name: \
  292. { \
  293. PROCESS_READ_LAYOUT_ASMJS(name, Double1Int1, suffix); \
  294. SetRegRawDouble(playout->D0, \
  295. func((unsigned int)GetRegRawInt(playout->I1)) ); \
  296. break; \
  297. }
  298. #define PROCESS_U1toD1Mem(name, func) PROCESS_U1toD1Mem_COMMON(name, func,)
  299. #define PROCESS_U1toF1Mem_COMMON(name, func, suffix) \
  300. case OpCodeAsmJs::name: \
  301. { \
  302. PROCESS_READ_LAYOUT_ASMJS(name, Float1Int1, suffix); \
  303. SetRegRawFloat(playout->F0, \
  304. func((unsigned int)GetRegRawInt(playout->I1)) ); \
  305. break; \
  306. }
  307. #define PROCESS_U1toF1Mem(name, func) PROCESS_U1toF1Mem_COMMON(name, func,)
  308. #define PROCESS_F1toD1Mem_COMMON(name, func, suffix) \
  309. case OpCodeAsmJs::name: \
  310. { \
  311. PROCESS_READ_LAYOUT_ASMJS(name, Double1Float1, suffix); \
  312. SetRegRawDouble(playout->D0, \
  313. func((float)GetRegRawFloat(playout->F1))); \
  314. break; \
  315. }
  316. #define PROCESS_F1toD1Mem(name, func) PROCESS_F1toD1Mem_COMMON(name, func,)
  317. #define PROCESS_R1toD1Mem_COMMON(name, func, suffix) \
  318. case OpCodeAsmJs::name: \
  319. { \
  320. PROCESS_READ_LAYOUT_ASMJS(name, Double1Reg1, suffix); \
  321. SetRegRawDouble(playout->D0, \
  322. func(GetRegRawPtr(playout->R1),scriptContext)); \
  323. break; \
  324. }
  325. #define PROCESS_R1toD1Mem(name, func) PROCESS_R1toD1Mem_COMMON(name, func,)
  326. #define PROCESS_R1toF1Mem_COMMON(name, func, suffix) \
  327. case OpCodeAsmJs::name: \
  328. { \
  329. PROCESS_READ_LAYOUT_ASMJS(name, Float1Reg1, suffix); \
  330. SetRegRawFloat(playout->F0, \
  331. (float)func(GetRegRawPtr(playout->R1), scriptContext)); \
  332. break; \
  333. }
  334. #define PROCESS_R1toF1Mem(name, func) PROCESS_R1toF1Mem_COMMON(name, func,)
  335. #define PROCESS_R1toI1Mem_COMMON(name, func, suffix) \
  336. case OpCodeAsmJs::name: \
  337. { \
  338. PROCESS_READ_LAYOUT_ASMJS(name, Int1Reg1, suffix); \
  339. SetRegRawInt(playout->I0, \
  340. func(GetRegRawPtr(playout->R1),scriptContext)); \
  341. break; \
  342. }
  343. #define PROCESS_R1toI1Mem(name, func) PROCESS_R1toI1Mem_COMMON(name, func,)
  344. #define PROCESS_R1toL1Mem_COMMON(name, func, suffix) \
  345. case OpCodeAsmJs::name: \
  346. { \
  347. PROCESS_READ_LAYOUT_ASMJS(name, Long1Reg1, suffix); \
  348. SetRegRawInt64(playout->L0, \
  349. func(GetRegRawPtr(playout->R1),scriptContext)); \
  350. break; \
  351. }
  352. #define PROCESS_R1toL1Mem(name, func) PROCESS_R1toL1Mem_COMMON(name, func,)
  353. #define PROCESS_D1toR1Mem_COMMON(name, func, suffix) \
  354. case OpCodeAsmJs::name: \
  355. { \
  356. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Double1, suffix); \
  357. SetRegRaw(playout->R0, \
  358. func(GetRegRawDouble(playout->D1),scriptContext)); \
  359. break; \
  360. }
  361. #define PROCESS_F1toR1Mem_COMMON(name, func, suffix) \
  362. case OpCodeAsmJs::name: \
  363. { \
  364. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Float1, suffix); \
  365. SetRegRawFloat(playout->R0, \
  366. GetRegRawFloat(playout->F1)); \
  367. break; \
  368. }
  369. #define PROCESS_D1toR1Mem(name, func) PROCESS_D1toR1Mem_COMMON(name, func,)
  370. #define PROCESS_F1toR1Mem(name, func) PROCESS_F1toR1Mem_COMMON(name, func,)
  371. #define PROCESS_C1toI1_COMMON(name, func, suffix) \
  372. case OpCodeAsmJs::name: \
  373. { \
  374. PROCESS_READ_LAYOUT_ASMJS(name, Int1Const1, suffix); \
  375. SetRegRawInt( playout->I0, playout->C1 ); \
  376. break; \
  377. }
  378. #define PROCESS_C1toI1(name, func) PROCESS_C1toI1_COMMON(name, func,)
  379. #define PROCESS_F1toI1Ctx_COMMON(name, func, suffix) \
  380. case OpCodeAsmJs::name: \
  381. { \
  382. PROCESS_READ_LAYOUT_ASMJS(name, Int1Float1, suffix); \
  383. SetRegRawInt( playout->I0, func(GetRegRawFloat(playout->F1),scriptContext)); \
  384. break; \
  385. }
  386. #define PROCESS_F1toI1Ctx(name, func) PROCESS_F1toI1Ctx_COMMON(name, func,)
  387. #define PROCESS_F1toL1Ctx_COMMON(name, func, suffix) \
  388. case OpCodeAsmJs::name: \
  389. { \
  390. PROCESS_READ_LAYOUT_ASMJS(name, Long1Float1, suffix); \
  391. SetRegRawInt64( playout->L0, func(GetRegRawFloat(playout->F1),scriptContext)); \
  392. break; \
  393. }
  394. #define PROCESS_F1toL1Ctx(name, func) PROCESS_F1toL1Ctx_COMMON(name, func,)
  395. #define PROCESS_D1toI1Ctx_COMMON(name, func, suffix) \
  396. case OpCodeAsmJs::name: \
  397. { \
  398. PROCESS_READ_LAYOUT_ASMJS(name,Int1Double1, suffix); \
  399. SetRegRawInt( playout->I0, func(GetRegRawDouble(playout->D1),scriptContext)); \
  400. break; \
  401. }
  402. #define PROCESS_D1toI1Ctx(name, func) PROCESS_D1toI1Ctx_COMMON(name, func,)
  403. #define PROCESS_D1toL1Ctx_COMMON(name, func, suffix) \
  404. case OpCodeAsmJs::name: \
  405. { \
  406. PROCESS_READ_LAYOUT_ASMJS(name, Long1Double1, suffix); \
  407. SetRegRawInt64( playout->L0, func(GetRegRawDouble(playout->D1),scriptContext)); \
  408. break; \
  409. }
  410. #define PROCESS_D1toL1Ctx(name, func) PROCESS_D1toL1Ctx_COMMON(name, func,)
  411. #define PROCESS_C1toL1_COMMON(name, func, suffix) \
  412. case OpCodeAsmJs::name: \
  413. { \
  414. PROCESS_READ_LAYOUT_ASMJS(name, Long1Const1, suffix); \
  415. SetRegRawInt64( playout->L0, playout->C1 ); \
  416. break; \
  417. }
  418. #define PROCESS_C1toL1(name, func) PROCESS_C1toL1_COMMON(name, func,)
  419. #define PROCESS_C1toF1_COMMON(name, func, suffix) \
  420. case OpCodeAsmJs::name: \
  421. { \
  422. PROCESS_READ_LAYOUT_ASMJS(name, Float1Const1, suffix); \
  423. SetRegRawFloat( playout->F0, playout->C1 ); \
  424. break; \
  425. }
  426. #define PROCESS_C1toF1(name, func) PROCESS_C1toF1_COMMON(name, func,)
  427. #define PROCESS_C1toD1_COMMON(name, func, suffix) \
  428. case OpCodeAsmJs::name: \
  429. { \
  430. PROCESS_READ_LAYOUT_ASMJS(name, Double1Const1, suffix); \
  431. SetRegRawDouble( playout->D0, playout->C1 ); \
  432. break; \
  433. }
  434. #define PROCESS_C1toD1(name, func) PROCESS_C1toD1_COMMON(name, func,)
  435. #define PROCESS_I1toR1Mem_COMMON(name, func, suffix) \
  436. case OpCodeAsmJs::name: \
  437. { \
  438. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Int1, suffix); \
  439. SetRegRawInt(playout->R0, \
  440. GetRegRawInt(playout->I1)); \
  441. break; \
  442. }
  443. #define PROCESS_I1toR1Mem(name, func) PROCESS_I1toR1Mem_COMMON(name, func,)
  444. #define PROCESS_I1toR1Out_COMMON(name, func, suffix) \
  445. case OpCodeAsmJs::name: \
  446. { \
  447. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Int1, suffix); \
  448. func(playout->R0, GetRegRawInt(playout->I1)); \
  449. break; \
  450. }
  451. #define PROCESS_F1toR1Out_COMMON(name, func, suffix) \
  452. case OpCodeAsmJs::name: \
  453. { \
  454. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Float1, suffix); \
  455. func(playout->R0, GetRegRawFloat(playout->F1)); \
  456. break; \
  457. }
  458. #define PROCESS_L1toR1Out_COMMON(name, func, suffix) \
  459. case OpCodeAsmJs::name: \
  460. { \
  461. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Long1, suffix); \
  462. func(playout->R0, GetRegRawInt64(playout->L1)); \
  463. break; \
  464. }
  465. #define PROCESS_D1toR1Out_COMMON(name, func, suffix) \
  466. case OpCodeAsmJs::name: \
  467. { \
  468. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Double1, suffix); \
  469. func(playout->R0, GetRegRawDouble(playout->D1)); \
  470. break; \
  471. }
  472. #define PROCESS_L2toI1Mem_COMMON(name, func, suffix) \
  473. case OpCodeAsmJs::name: \
  474. { \
  475. PROCESS_READ_LAYOUT_ASMJS(name, Int1Long2, suffix); \
  476. SetRegRawInt(playout->I0, \
  477. func(GetRegRawInt64(playout->L1),GetRegRawInt64(playout->L2))); \
  478. break; \
  479. }
  480. #define PROCESS_D2toI1Mem_COMMON(name, func, suffix) \
  481. case OpCodeAsmJs::name: \
  482. { \
  483. PROCESS_READ_LAYOUT_ASMJS(name, Int1Double2, suffix); \
  484. SetRegRawInt(playout->I0, \
  485. func(GetRegRawDouble(playout->D1),GetRegRawDouble(playout->D2))); \
  486. break; \
  487. }
  488. #define PROCESS_F2toI1Mem_COMMON(name, func, suffix) \
  489. case OpCodeAsmJs::name: \
  490. { \
  491. PROCESS_READ_LAYOUT_ASMJS(name, Int1Float2, suffix); \
  492. SetRegRawInt(playout->I0, \
  493. func(GetRegRawFloat(playout->F1), GetRegRawFloat(playout->F2))); \
  494. break; \
  495. }
  496. #define PROCESS_D2toI1Mem(name, func) PROCESS_D2toI1Mem_COMMON(name, func,)
  497. #define PROCESS_F2toI1Mem(name, func) PROCESS_F2toI1Mem_COMMON(name, func,)
  498. #define PROCESS_BR_ASM_Mem_COMMON(name, func,suffix) \
  499. case OpCodeAsmJs::name: \
  500. { \
  501. PROCESS_READ_LAYOUT_ASMJS(name, BrInt2, suffix); \
  502. if (func(GetRegRawInt(playout->I1), GetRegRawInt(playout->I2))) \
  503. { \
  504. ip = m_reader.SetCurrentRelativeOffset(ip, playout->RelativeJumpOffset); \
  505. } \
  506. break; \
  507. }
  508. #define PROCESS_BR_ASM_Mem(name, func) PROCESS_BR_ASM_Mem_COMMON(name, func,)
  509. #define PROCESS_BR_ASM_Const_COMMON(name, func,suffix) \
  510. case OpCodeAsmJs::name: \
  511. { \
  512. PROCESS_READ_LAYOUT_ASMJS(name, BrInt1Const1, suffix); \
  513. if (func(GetRegRawInt(playout->I1), playout->C1)) \
  514. { \
  515. ip = m_reader.SetCurrentRelativeOffset(ip, playout->RelativeJumpOffset); \
  516. } \
  517. break; \
  518. }
  519. #define PROCESS_BR_ASM_Const(name, func) PROCESS_BR_ASM_Const_COMMON(name, func,)
  520. #define PROCESS_BR_ASM_MemStack_COMMON(name, func,suffix) \
  521. case OpCodeAsmJs::name: \
  522. { \
  523. PROCESS_READ_LAYOUT_ASMJS(name, BrInt1, suffix); \
  524. if (GetRegRawInt(playout->I1)) \
  525. { \
  526. ip = m_reader.SetCurrentRelativeOffset(ip, playout->RelativeJumpOffset); \
  527. } \
  528. break; \
  529. }
  530. #define PROCESS_BR_ASM_MemStack(name, func) PROCESS_BR_ASM_MemStack_COMMON(name, func,)
  531. #define PROCESS_BR_ASM_MemStackF_COMMON(name, func,suffix) \
  532. case OpCodeAsmJs::name: \
  533. { \
  534. PROCESS_READ_LAYOUT_ASMJS(name, BrInt1, suffix); \
  535. if (!GetRegRawInt(playout->I1)) \
  536. { \
  537. ip = m_reader.SetCurrentRelativeOffset(ip, playout->RelativeJumpOffset); \
  538. } \
  539. break; \
  540. }
  541. #define PROCESS_BR_ASM_MemStackF(name, func) PROCESS_BR_ASM_MemStackF_COMMON(name, func,)
  542. #define PROCESS_TEMPLATE_ASMJS_COMMON(name, func, layout, suffix, type) \
  543. case OpCodeAsmJs::name: \
  544. { \
  545. PROCESS_READ_LAYOUT_ASMJS(name, layout, suffix); \
  546. func<OpLayout##layout##suffix,type>(playout); \
  547. break; \
  548. }
  549. // initializers
  550. #define PROCESS_SIMD_F4_1toR1Mem_COMMON(name, func, suffix) \
  551. case OpCodeAsmJs::name: \
  552. { \
  553. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Float32x4_1, suffix); \
  554. func(playout->R0, GetRegRawSimd(playout->F4_1)); \
  555. break; \
  556. }
  557. #define PROCESS_SIMD_F4_1toR1Mem(name, func) PROCESS_SIMD_F4_1toR1Mem_COMMON(name, func,)
  558. #define PROCESS_SIMD_I4_1toR1Mem_COMMON(name, func, suffix) \
  559. case OpCodeAsmJs::name: \
  560. { \
  561. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Int32x4_1, suffix); \
  562. func(playout->R0, GetRegRawSimd(playout->I4_1)); \
  563. break; \
  564. }
  565. #define PROCESS_SIMD_I4_1toR1Mem(name, func) PROCESS_SIMD_I4_1toR1Mem_COMMON(name, func,)
  566. #define PROCESS_SIMD_I1toB4_1_COMMON(name, func, suffix) \
  567. case OpCodeAsmJs::name: \
  568. { \
  569. PROCESS_READ_LAYOUT_ASMJS(name, Bool32x4_1Int1, suffix); \
  570. SetRegRawSimd(playout->B4_0, func((GetRegRawInt(playout->I1)) ? -1 : 0)); \
  571. break; \
  572. }
  573. #define PROCESS_SIMD_I1toB4_1(name, func) PROCESS_SIMD_I1toB4_1_COMMON(name, func,)
  574. #define PROCESS_SIMD_I1toB8_1_COMMON(name, func, suffix) \
  575. case OpCodeAsmJs::name: \
  576. { \
  577. PROCESS_READ_LAYOUT_ASMJS(name, Bool16x8_1Int1, suffix); \
  578. SetRegRawSimd(playout->B8_0, func((GetRegRawInt(playout->I1)) ? -1 : 0)); \
  579. break; \
  580. }
  581. #define PROCESS_SIMD_I1toB8_1(name, func) PROCESS_SIMD_I1toB8_1_COMMON(name, func,)
  582. #define PROCESS_SIMD_I1toB16_1_COMMON(name, func, suffix) \
  583. case OpCodeAsmJs::name: \
  584. { \
  585. PROCESS_READ_LAYOUT_ASMJS(name, Bool8x16_1Int1, suffix); \
  586. SetRegRawSimd(playout->B16_0, func((GetRegRawInt(playout->I1)) ? -1 : 0)); \
  587. break; \
  588. }
  589. #define PROCESS_SIMD_I1toB16_1(name, func) PROCESS_SIMD_I1toB16_1_COMMON(name, func,)
  590. #define PROCESS_SIMD_B4_1toR1Mem_COMMON(name, func, suffix) \
  591. case OpCodeAsmJs::name: \
  592. { \
  593. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Bool32x4_1, suffix); \
  594. func(playout->R0, GetRegRawSimd(playout->B4_1)); \
  595. break; \
  596. }
  597. #define PROCESS_SIMD_B4_1toR1Mem(name, func, suffix) PROCESS_B4_1toR1Mem_COMMON(name, func, suffix)
  598. #define PROCESS_SIMD_B8_1toR1Mem_COMMON(name, func, suffix) \
  599. case OpCodeAsmJs::name: \
  600. { \
  601. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Bool16x8_1, suffix); \
  602. func(playout->R0, GetRegRawSimd(playout->B8_1)); \
  603. break; \
  604. }
  605. #define PROCESS_SIMD_B8_1toR1Mem(name, func, suffix) PROCESS_B8_1toR1Mem_COMMON(name, func, suffix)
  606. #define PROCESS_SIMD_B16_1toR1Mem_COMMON(name, func, suffix) \
  607. case OpCodeAsmJs::name: \
  608. { \
  609. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Bool8x16_1, suffix); \
  610. func(playout->R0, GetRegRawSimd(playout->B16_1)); \
  611. break; \
  612. }
  613. #define PROCESS_SIMD_B16_1toR1Mem(name, func, suffix) PROCESS_B16_1toR1Mem_COMMON(name, func, suffix)
  614. #define PROCESS_SIMD_I16_1toR1Mem_COMMON(name, func, suffix) \
  615. case OpCodeAsmJs::name: \
  616. { \
  617. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Int8x16_1, suffix); \
  618. func(playout->R0, GetRegRawSimd(playout->I16_1)); \
  619. break; \
  620. }
  621. #define PROCESS_SIMD_I16_1toR1Mem(name, func, suffix) PROCESS_I16_1toR1Mem_COMMON(name, func, suffix)
  622. #define PROCESS_SIMD_D2_1toR1Mem_COMMON(name, func, suffix) \
  623. case OpCodeAsmJs::name: \
  624. { \
  625. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Float64x2_1, suffix); \
  626. func(playout->R0, GetRegRawSimd(playout->D2_1)); \
  627. break; \
  628. }
  629. #define PROCESS_SIMD_D2_1toR1Mem(name, func) PROCESS_SIMD_D2_1toR1Mem_COMMON(name, func,)
  630. #define PROCESS_SIMD_I8_1toR1Mem_COMMON(name, func, suffix) \
  631. case OpCodeAsmJs::name: \
  632. { \
  633. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Int16x8_1, suffix); \
  634. func(playout->R0, GetRegRawSimd(playout->I8_1)); \
  635. break; \
  636. }
  637. #define PROCESS_SIMD_I8_1toR1Mem(name, func) PROCESS_SIMD_I8_1toR1Mem_COMMON(name, func,)
  638. #define PROCESS_SIMD_U4_1toR1Mem_COMMON(name, func, suffix) \
  639. case OpCodeAsmJs::name: \
  640. { \
  641. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Uint32x4_1, suffix); \
  642. func(playout->R0, GetRegRawSimd(playout->U4_1)); \
  643. break; \
  644. }
  645. #define PROCESS_SIMD_U4_1toR1Mem(name, func) PROCESS_SIMD_U4_1toR1Mem_COMMON(name, func,)
  646. #define PROCESS_SIMD_U8_1toR1Mem_COMMON(name, func, suffix) \
  647. case OpCodeAsmJs::name: \
  648. { \
  649. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Uint16x8_1, suffix); \
  650. func(playout->R0, GetRegRawSimd(playout->U8_1)); \
  651. break; \
  652. }
  653. #define PROCESS_SIMD_U8_1toR1Mem(name, func) PROCESS_SIMD_U8_1toR1Mem_COMMON(name, func,)
  654. #define PROCESS_SIMD_U16_1toR1Mem_COMMON(name, func, suffix) \
  655. case OpCodeAsmJs::name: \
  656. { \
  657. PROCESS_READ_LAYOUT_ASMJS(name, Reg1Uint8x16_1, suffix); \
  658. func(playout->R0, GetRegRawSimd(playout->U16_1)); \
  659. break; \
  660. }
  661. #define PROCESS_SIMD_U16_1toR1Mem(name, func) PROCESS_SIMD_U16_1toR1Mem_COMMON(name, func,)
  662. #define PROCESS_SIMD_I1toI4_1_COMMON(name, func, suffix) \
  663. case OpCodeAsmJs::name: \
  664. { \
  665. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Int1, suffix); \
  666. SetRegRawSimd(playout->I4_0, func(GetRegRawInt(playout->I1))); \
  667. break; \
  668. }
  669. #define PROCESS_SIMD_I1toI4_1(name, func) PROCESS_SIMD_I1toI4_1_COMMON(name, func,)
  670. #define PROCESS_SIMD_I1toI16_1_COMMON(name, func, suffix) \
  671. case OpCodeAsmJs::name: \
  672. { \
  673. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_1Int1, suffix); \
  674. SetRegRawSimd(playout->I16_0, func(static_cast<int8>(GetRegRawInt(playout->I1)))); \
  675. break; \
  676. }
  677. #define PROCESS_SIMD_I1toI16_1(name, func, suffix) PROCESS_SIMD_I1toI16_1_COMMON(name, func, suffix)
  678. #define PROCESS_SIMD_I1toI8_1_COMMON(name, func, suffix) \
  679. case OpCodeAsmJs::name: \
  680. { \
  681. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_1Int1, suffix); \
  682. SetRegRawSimd(playout->I8_0, func((int16)GetRegRawInt(playout->I1))); \
  683. break; \
  684. }
  685. #define PROCESS_SIMD_I1toI8_1_1(name, func) PROCESS_SIMD_I1toI8_1_COMMON(name, func,)
  686. #define PROCESS_SIMD_I1toU4_1_COMMON(name, func, suffix) \
  687. case OpCodeAsmJs::name: \
  688. { \
  689. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_1Int1, suffix); \
  690. SetRegRawSimd(playout->U4_0, func((uint32)GetRegRawInt(playout->I1))); \
  691. break; \
  692. }
  693. #define PROCESS_SIMD_I1toU4_1(name, func) PROCESS_SIMD_I1toU4_1_COMMON(name, func,)
  694. #define PROCESS_SIMD_I1toU8_1_COMMON(name, func, suffix) \
  695. case OpCodeAsmJs::name: \
  696. { \
  697. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_1Int1, suffix); \
  698. SetRegRawSimd(playout->U8_0, func((uint16)GetRegRawInt(playout->I1))); \
  699. break; \
  700. }
  701. #define PROCESS_SIMD_I1toU8_1(name, func) PROCESS_SIMD_I1toU8_1_COMMON(name, func,)
  702. #define PROCESS_SIMD_I1toU16_1_COMMON(name, func, suffix) \
  703. case OpCodeAsmJs::name: \
  704. { \
  705. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_1Int1, suffix); \
  706. SetRegRawSimd(playout->U16_0, func((uint8)GetRegRawInt(playout->I1))); \
  707. break; \
  708. }
  709. #define PROCESS_SIMD_I1toU16_1(name, func) PROCESS_SIMD_I1toU16_1_COMMON(name, func,)
  710. #define PROCESS_SIMD_B2_1toI1_COMMON(name, func, suffix) \
  711. case OpCodeAsmJs::name: \
  712. { \
  713. PROCESS_READ_LAYOUT_ASMJS(name, Int1Bool64x2_1, suffix); \
  714. SetRegRawInt(playout->I0, func(GetRegRawSimd(playout->I2_1))); \
  715. break; \
  716. }
  717. #define PROCESS_SIMD_B2_1toI1(name, func) PROCESS_SIMD_B2_1toI1_COMMON(name, func,)
  718. #define PROCESS_SIMD_L1toI2_1_COMMON(name, func, suffix) \
  719. case OpCodeAsmJs::name: \
  720. { \
  721. PROCESS_READ_LAYOUT_ASMJS(name, Int64x2_1Long1, suffix); \
  722. SetRegRawSimd(playout->I2_0, func(GetRegRawInt64(playout->L1))); \
  723. break; \
  724. }
  725. #define PROCESS_SIMD_L1toI2_1(name, func) PROCESS_SIMD_L1toI2_1_COMMON(name, func,)
  726. #define PROCESS_SIMD_I2_1I1toL1_COMMON(name, func, suffix) \
  727. case OpCodeAsmJs::name: \
  728. { \
  729. PROCESS_READ_LAYOUT_ASMJS(name, Long1Int64x2_1Int1, suffix); \
  730. SetRegRawInt64(playout->L0, func(GetRegRawSimd(playout->I2_1), GetRegRawInt(playout->I2))); \
  731. break; \
  732. }
  733. #define PROCESS_SIMD_I2_1I1toL1(name, func) PROCESS_SIMD_I2_1I1toL1_COMMON(name, func,)
  734. #define PROCESS_SIMD_I2_1I1L1toI2_1_COMMON(name, func, suffix) \
  735. case OpCodeAsmJs::name: \
  736. { \
  737. PROCESS_READ_LAYOUT_ASMJS(name, Int64x2_2_Int1_Long1, suffix); \
  738. SetRegRawSimd(playout->I2_0, func(GetRegRawSimd(playout->I2_1), GetRegRawInt(playout->I2), GetRegRawInt64(playout->L3))); \
  739. break; \
  740. }
  741. #define PROCESS_SIMD_I2_1I1L1toI2_1(name, func) PROCESS_SIMD_I2_1I1L1toI2_1_COMMON(name, func,)
  742. #define PROCESS_SIMD_I2_2toI2_1_COMMON(name, func, suffix) \
  743. case OpCodeAsmJs::name: \
  744. { \
  745. PROCESS_READ_LAYOUT_ASMJS(name, Int64x2_3, suffix); \
  746. SetRegRawSimd(playout->I2_0, func(GetRegRawSimd(playout->I2_1), GetRegRawSimd(playout->I2_2))); \
  747. break; \
  748. }
  749. #define PROCESS_SIMD_I2_2toI2_1(name, func) PROCESS_SIMD_I2_2toI2_1_COMMON(name, func,)
  750. #define PROCESS_SIMD_I2_1toI2_1_COMMON(name, func, suffix) \
  751. case OpCodeAsmJs::name: \
  752. { \
  753. PROCESS_READ_LAYOUT_ASMJS(name, Int64x2_2, suffix); \
  754. SetRegRawSimd(playout->I2_0, func(GetRegRawSimd(playout->I2_1))); \
  755. break; \
  756. }
  757. #define PROCESS_SIMD_I2_1toI2_1 (name, func) PROCESS_SIMD_I2_1toI2_1_COMMON(name, func,)
  758. #define PROCESS_SIMD_I2_1toI2_P_COMMON(name, func, suffix) \
  759. case OpCodeAsmJs::name: \
  760. { \
  761. PROCESS_READ_LAYOUT_ASMJS(name, Int64x2_2, suffix); \
  762. SIMDValue result {0}; \
  763. SIMDValue src = GetRegRawSimd(playout->I2_1); \
  764. func(&result, &src); \
  765. SetRegRawSimd(playout->I2_0, result); \
  766. break; \
  767. }
  768. #define PROCESS_SIMD_I2_1toI2_P(name, func) PROCESS_SIMD_I2_1toI2_P_COMMON(name, func,)
  769. #define PROCESS_SIMD_I2_1I1toI2_1_COMMON(name, func, suffix) \
  770. case OpCodeAsmJs::name: \
  771. { \
  772. PROCESS_READ_LAYOUT_ASMJS(name, Int64x2_2Int1, suffix); \
  773. SIMDValue result {0}; \
  774. SIMDValue src = GetRegRawSimd(playout->I2_1); \
  775. func(&result, &src, GetRegRawInt(playout->I2)); \
  776. SetRegRawSimd(playout->I2_0, result); \
  777. break; \
  778. }
  779. #define PROCESS_SIMD_I2_1I1toI2_1(name, func) PROCESS_SIMD_I2_1I1toI2_1_COMMON(name, func,)
  780. #define PROCESS_SIMD_F1toF4_1_COMMON(name, func, suffix) \
  781. case OpCodeAsmJs::name: \
  782. { \
  783. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Float1, suffix); \
  784. SetRegRawSimd(playout->F4_0, func(GetRegRawFloat(playout->F1))); \
  785. break; \
  786. }
  787. #define PROCESS_SIMD_F1toF4_1(name, func) PROCESS_SIMD_F1toF4_1_COMMON(name, func,)
  788. #define PROCESS_SIMD_D1toD2_1_COMMON(name, func, suffix) \
  789. case OpCodeAsmJs::name: \
  790. { \
  791. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_1Double1, suffix); \
  792. SetRegRawSimd(playout->D2_0, func(GetRegRawDouble(playout->D1))); \
  793. break; \
  794. }
  795. #define PROCESS_SIMD_D1toD2_1(name, func) PROCESS_SIMD_D1toD2_1_COMMON(name, func,)
  796. //// Value transfer
  797. #define PROCESS_SIMD_F4toF4_1_COMMON(name, func, suffix)\
  798. case OpCodeAsmJs::name: \
  799. { \
  800. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Float4, suffix); \
  801. SetRegRawSimd(playout->F4_0, func(GetRegRawFloat(playout->F1), GetRegRawFloat(playout->F2), GetRegRawFloat(playout->F3), GetRegRawFloat(playout->F4))); \
  802. break; \
  803. }
  804. #define PROCESS_SIMD_F4toF4_1(name, func) PROCESS_SIMD_F4toF4_1_COMMON(name, func,)
  805. #define PROCESS_SIMD_I4toI4_1_COMMON(name, func, suffix)\
  806. case OpCodeAsmJs::name: \
  807. { \
  808. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Int4, suffix); \
  809. SetRegRawSimd(playout->I4_0, func(GetRegRawInt(playout->I1), GetRegRawInt(playout->I2), GetRegRawInt(playout->I3), GetRegRawInt(playout->I4))); \
  810. break; \
  811. }
  812. #define PROCESS_SIMD_I4toI4_1(name, func) PROCESS_SIMD_I4toI4_1_COMMON(name, func,)
  813. #define PROCESS_SIMD_I4toU4_1_COMMON(name, func, suffix)\
  814. case OpCodeAsmJs::name: \
  815. { \
  816. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_1Int4, suffix); \
  817. SetRegRawSimd(playout->U4_0, func((uint32)GetRegRawInt(playout->I1), (uint32)GetRegRawInt(playout->I2), (uint32)GetRegRawInt(playout->I3), (uint32)GetRegRawInt(playout->I4))); \
  818. break; \
  819. }
  820. #define PROCESS_SIMD_I4toU4_1(name, func) PROCESS_SIMD_I4toU4_1_COMMON(name, func,)
  821. #define PROCESS_SIMD_D2toD2_1_COMMON(name, func, suffix)\
  822. case OpCodeAsmJs::name: \
  823. { \
  824. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_1Double2, suffix); \
  825. SetRegRawSimd(playout->D2_0, func(GetRegRawDouble(playout->D1), GetRegRawDouble(playout->D2))); \
  826. break; \
  827. }
  828. #define PROCESS_SIMD_D2toD2_1(name, func) PROCESS_SIMD_D2toD2_1_COMMON(name, func,)
  829. //// Conversions
  830. #define PROCESS_SIMD_D2_1toF4_1_COMMON(name, func, suffix)\
  831. case OpCodeAsmJs::name: \
  832. { \
  833. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Float64x2_1, suffix); \
  834. SetRegRawSimd(playout->F4_0, \
  835. func(GetRegRawSimd(playout->D2_1))); \
  836. break; \
  837. }
  838. #define PROCESS_SIMD_D2_1toF4_1(name, func) PROCESS_SIMD_D2_1toF4_1_COMMON(name, func,)
  839. #define PROCESS_SIMD_I4_1toF4_1_COMMON(name, func, suffix)\
  840. case OpCodeAsmJs::name: \
  841. { \
  842. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Int32x4_1, suffix); \
  843. SetRegRawSimd(playout->F4_0, \
  844. func(GetRegRawSimd(playout->I4_1))); \
  845. break; \
  846. }
  847. #define PROCESS_SIMD_I4_1toF4_1_1(name, func) PROCESS_SIMD_I4_1toF4_1_COMMON(name, func,)
  848. #define PROCESS_SIMD_I8_1toF4_1_COMMON(name, func, suffix)\
  849. case OpCodeAsmJs::name: \
  850. { \
  851. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Int16x8_1, suffix); \
  852. SetRegRawSimd(playout->F4_0, \
  853. func(GetRegRawSimd(playout->I8_1))); \
  854. break; \
  855. }
  856. #define PROCESS_SIMD_I8_1toF4_1_1(name, func) PROCESS_SIMD_I8_1toF4_1_COMMON(name, func,)
  857. #define PROCESS_SIMD_I16_1toF4_1_COMMON(name, func, suffix)\
  858. case OpCodeAsmJs::name: \
  859. { \
  860. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Int8x16_1, suffix); \
  861. SetRegRawSimd(playout->F4_0, \
  862. func(GetRegRawSimd(playout->I16_1))); \
  863. break; \
  864. }
  865. #define PROCESS_SIMD_I16_1toF4_1_1(name, func) PROCESS_SIMD_I16_1toF4_1_COMMON(name, func,)
  866. #define PROCESS_SIMD_U4_1toF4_1_COMMON(name, func, suffix)\
  867. case OpCodeAsmJs::name: \
  868. { \
  869. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Uint32x4_1, suffix); \
  870. SetRegRawSimd(playout->F4_0, \
  871. func(GetRegRawSimd(playout->U4_1))); \
  872. break; \
  873. }
  874. #define PROCESS_SIMD_U4_1toF4_1_1(name, func) PROCESS_SIMD_U4_1toF4_1_COMMON(name, func,)
  875. #define PROCESS_SIMD_U8_1toF4_1_COMMON(name, func, suffix)\
  876. case OpCodeAsmJs::name: \
  877. { \
  878. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Uint16x8_1, suffix); \
  879. SetRegRawSimd(playout->F4_0, \
  880. func(GetRegRawSimd(playout->U8_1))); \
  881. break; \
  882. }
  883. #define PROCESS_SIMD_U8_1toF4_1_1(name, func) PROCESS_SIMD_U8_1toF4_1_COMMON(name, func,)
  884. #define PROCESS_SIMD_U16_1toF4_1_COMMON(name, func, suffix)\
  885. case OpCodeAsmJs::name: \
  886. { \
  887. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Uint8x16_1, suffix); \
  888. SetRegRawSimd(playout->F4_0, \
  889. func(GetRegRawSimd(playout->U16_1))); \
  890. break; \
  891. }
  892. #define PROCESS_SIMD_U16_1toF4_1_1(name, func) PROCESS_SIMD_U16_1toF4_1_COMMON(name, func,)
  893. #define PROCESS_SIMD_D2_1toI4_1_COMMON(name, func, suffix)\
  894. case OpCodeAsmJs::name: \
  895. { \
  896. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Float64x2_1, suffix); \
  897. SetRegRawSimd(playout->I4_0, \
  898. func(GetRegRawSimd(playout->D2_1))); \
  899. break; \
  900. }
  901. #define PROCESS_SIMD_D2_1toI4_1(name, func) PROCESS_SIMD_D2_1toI4_1_COMMON(name, func,)
  902. #define PROCESS_SIMD_F4_1toI4_1_COMMON(name, func, suffix)\
  903. case OpCodeAsmJs::name: \
  904. { \
  905. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Float32x4_1, suffix); \
  906. SetRegRawSimd(playout->I4_0, \
  907. func(GetRegRawSimd(playout->F4_1))); \
  908. break; \
  909. }
  910. #define PROCESS_SIMD_F4_1toI4_1(name, func) PROCESS_SIMD_F4_1toI4_1_COMMON(name, func,)
  911. #define PROCESS_SIMD_I8_1toI4_1_COMMON(name, func, suffix)\
  912. case OpCodeAsmJs::name: \
  913. { \
  914. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Int16x8_1, suffix); \
  915. SetRegRawSimd(playout->I4_0, \
  916. func(GetRegRawSimd(playout->I8_1))); \
  917. break; \
  918. }
  919. #define PROCESS_SIMD_I8_1toI4_1(name, func) PROCESS_SIMD_I8_1toI4_1_COMMON(name, func,)
  920. #define PROCESS_SIMD_I16_1toI4_1_COMMON(name, func, suffix)\
  921. case OpCodeAsmJs::name: \
  922. { \
  923. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Int8x16_1, suffix); \
  924. SetRegRawSimd(playout->I4_0, \
  925. func(GetRegRawSimd(playout->I16_1))); \
  926. break; \
  927. }
  928. #define PROCESS_SIMD_I16_1toI4_1(name, func) PROCESS_SIMD_I16_1toI4_1_COMMON(name, func,)
  929. #define PROCESS_SIMD_U8_1toI4_1_COMMON(name, func, suffix)\
  930. case OpCodeAsmJs::name: \
  931. { \
  932. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Uint16x8_1, suffix); \
  933. SetRegRawSimd(playout->I4_0, \
  934. func(GetRegRawSimd(playout->U8_1))); \
  935. break; \
  936. }
  937. #define PROCESS_SIMD_U8_1toI4_1(name, func) PROCESS_SIMD_U8_1toI4_1_COMMON(name, func,)
  938. #define PROCESS_SIMD_U16_1toI4_1_COMMON(name, func, suffix)\
  939. case OpCodeAsmJs::name: \
  940. { \
  941. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Uint8x16_1, suffix); \
  942. SetRegRawSimd(playout->I4_0, \
  943. func(GetRegRawSimd(playout->U16_1))); \
  944. break; \
  945. }
  946. #define PROCESS_SIMD_U16_1toI4_1(name, func) PROCESS_SIMD_U16_1toI4_1_COMMON(name, func,)
  947. #define PROCESS_SIMD_U4_1toI4_1_COMMON(name, func, suffix)\
  948. case OpCodeAsmJs::name: \
  949. { \
  950. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Uint32x4_1, suffix); \
  951. SetRegRawSimd(playout->I4_0, \
  952. func(GetRegRawSimd(playout->U4_1))); \
  953. break; \
  954. }
  955. #define PROCESS_SIMD_U4_1toI4_1(name, func) PROCESS_SIMD_U4_1toI4_1_COMMON(name, func,)
  956. #define PROCESS_SIMD_F4_1toI8_1_COMMON(name, func, suffix)\
  957. case OpCodeAsmJs::name: \
  958. { \
  959. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_1Float32x4_1, suffix); \
  960. SetRegRawSimd(playout->I8_0, \
  961. func(GetRegRawSimd(playout->F4_1))); \
  962. break; \
  963. }
  964. #define PROCESS_SIMD_F4_1toI8_1(name, func) PROCESS_SIMD_F4_1toI8_1_COMMON(name, func,)
  965. #define PROCESS_SIMD_I4_1toI8_1_COMMON(name, func, suffix)\
  966. case OpCodeAsmJs::name: \
  967. { \
  968. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_1Int32x4_1, suffix); \
  969. SetRegRawSimd(playout->I8_0, \
  970. func(GetRegRawSimd(playout->I4_1))); \
  971. break; \
  972. }
  973. #define PROCESS_SIMD_I4_1toI8_1(name, func) PROCESS_SIMD_I4_1toI8_1_COMMON(name, func,)
  974. #define PROCESS_SIMD_I16_1toI8_1_COMMON(name, func, suffix)\
  975. case OpCodeAsmJs::name: \
  976. { \
  977. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_1Int8x16_1, suffix); \
  978. SetRegRawSimd(playout->I8_0, \
  979. func(GetRegRawSimd(playout->I16_1))); \
  980. break; \
  981. }
  982. #define PROCESS_SIMD_I16_1toI8_1(name, func) PROCESS_SIMD_I16_1toI8_1_COMMON(name, func,)
  983. // i16swizzle
  984. #define PROCESS_SIMD_I16_1I16toI16_1_COMMON(name, func, suffix) \
  985. case OpCodeAsmJs::name: \
  986. { \
  987. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_2Int16, suffix); \
  988. uint32 lanes[16]; \
  989. lanes[0] = GetRegRawInt(playout->I2); lanes[1] = GetRegRawInt(playout->I3); \
  990. lanes[2] = GetRegRawInt(playout->I4); lanes[3] = GetRegRawInt(playout->I5); \
  991. lanes[4] = GetRegRawInt(playout->I6); lanes[5] = GetRegRawInt(playout->I7); \
  992. lanes[6] = GetRegRawInt(playout->I8); lanes[7] = GetRegRawInt(playout->I9); \
  993. lanes[8] = GetRegRawInt(playout->I10); lanes[9] = GetRegRawInt(playout->I11); \
  994. lanes[10] = GetRegRawInt(playout->I12); lanes[11] = GetRegRawInt(playout->I13); \
  995. lanes[12] = GetRegRawInt(playout->I14); lanes[13] = GetRegRawInt(playout->I15); \
  996. lanes[14] = GetRegRawInt(playout->I16); lanes[15] = GetRegRawInt(playout->I17); \
  997. SetRegRawSimd(playout->I16_0, func(GetRegRawSimd(playout->I16_1), GetRegRawSimd(playout->I16_1), 16, lanes)); \
  998. break; \
  999. }
  1000. #define PROCESS_SIMD_I16_1I16toI16_1(name, func) PROCESS_SIMD_I16_1I16toI16_1_COMMON(name, func,)
  1001. // i16shuffle
  1002. #define PROCESS_SIMD_I16_2I16toI16_1_COMMON(name, func, suffix) \
  1003. case OpCodeAsmJs::name: \
  1004. { \
  1005. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_3Int16, suffix); \
  1006. uint32 lanes[16]; \
  1007. lanes[0] = GetRegRawInt(playout->I3); lanes[1] = GetRegRawInt(playout->I4); \
  1008. lanes[2] = GetRegRawInt(playout->I5); lanes[3] = GetRegRawInt(playout->I6); \
  1009. lanes[4] = GetRegRawInt(playout->I7); lanes[5] = GetRegRawInt(playout->I8); \
  1010. lanes[6] = GetRegRawInt(playout->I9); lanes[7] = GetRegRawInt(playout->I10); \
  1011. lanes[8] = GetRegRawInt(playout->I11); lanes[9] = GetRegRawInt(playout->I12); \
  1012. lanes[10] = GetRegRawInt(playout->I13); lanes[11] = GetRegRawInt(playout->I14); \
  1013. lanes[12] = GetRegRawInt(playout->I15); lanes[13] = GetRegRawInt(playout->I16); \
  1014. lanes[14] = GetRegRawInt(playout->I17); lanes[15] = GetRegRawInt(playout->I18); \
  1015. SetRegRawSimd(playout->I16_0, func(GetRegRawSimd(playout->I16_1), GetRegRawSimd(playout->I16_2), 16, lanes)); \
  1016. break; \
  1017. }
  1018. #define PROCESS_SIMD_I16_2I16toI16_1(name, func) PROCESS_SIMD_I16_2I16toI16_1_COMMON(name, func,)
  1019. #define PROCESS_SIMD_U4_1toI8_1_COMMON(name, func, suffix)\
  1020. case OpCodeAsmJs::name: \
  1021. { \
  1022. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_1Uint32x4_1, suffix); \
  1023. SetRegRawSimd(playout->I8_0, \
  1024. func(GetRegRawSimd(playout->U4_1))); \
  1025. break; \
  1026. }
  1027. #define PROCESS_SIMD_U4_1toI8_1(name, func) PROCESS_SIMD_U4_1toI8_1_COMMON(name, func,)
  1028. #define PROCESS_SIMD_U8_1toI8_1_COMMON(name, func, suffix)\
  1029. case OpCodeAsmJs::name: \
  1030. { \
  1031. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_1Uint16x8_1, suffix); \
  1032. SetRegRawSimd(playout->I8_0, \
  1033. func(GetRegRawSimd(playout->U8_1))); \
  1034. break; \
  1035. }
  1036. #define PROCESS_SIMD_U8_1toI8_1(name, func) PROCESS_SIMD_U8_1toI8_1_COMMON(name, func,)
  1037. #define PROCESS_SIMD_U16_1toI8_1_COMMON(name, func, suffix)\
  1038. case OpCodeAsmJs::name: \
  1039. { \
  1040. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_1Uint8x16_1, suffix); \
  1041. SetRegRawSimd(playout->I8_0, \
  1042. func(GetRegRawSimd(playout->U16_1))); \
  1043. break; \
  1044. }
  1045. #define PROCESS_SIMD_U16_1toI8_1(name, func) PROCESS_SIMD_U16_1toI8_1_COMMON(name, func,)
  1046. #define PROCESS_SIMD_F4_1toU4_1_COMMON(name, func, suffix)\
  1047. case OpCodeAsmJs::name: \
  1048. { \
  1049. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_1Float32x4_1, suffix); \
  1050. SetRegRawSimd(playout->U4_0, \
  1051. func(GetRegRawSimd(playout->F4_1))); \
  1052. break; \
  1053. }
  1054. #define PROCESS_SIMD_F4_1toU4_1(name, func) PROCESS_SIMD_F4_1toU4_1_COMMON(name, func,)
  1055. #define PROCESS_SIMD_I4_1toU4_1_COMMON(name, func, suffix)\
  1056. case OpCodeAsmJs::name: \
  1057. { \
  1058. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_1Int32x4_1, suffix); \
  1059. SetRegRawSimd(playout->U4_0, \
  1060. func(GetRegRawSimd(playout->I4_1))); \
  1061. break; \
  1062. }
  1063. #define PROCESS_SIMD_I4_1toU4_1(name, func) PROCESS_SIMD_I4_1toU4_1_COMMON(name, func,)
  1064. #define PROCESS_SIMD_I8_1toU4_1_COMMON(name, func, suffix)\
  1065. case OpCodeAsmJs::name: \
  1066. { \
  1067. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_1Int16x8_1, suffix); \
  1068. SetRegRawSimd(playout->U4_0, \
  1069. func(GetRegRawSimd(playout->I8_1))); \
  1070. break; \
  1071. }
  1072. #define PROCESS_SIMD_I8_1toU4_1(name, func) PROCESS_SIMD_I8_1toU4_1_COMMON(name, func,)
  1073. #define PROCESS_SIMD_I16_1toU4_1_COMMON(name, func, suffix)\
  1074. case OpCodeAsmJs::name: \
  1075. { \
  1076. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_1Int8x16_1, suffix); \
  1077. SetRegRawSimd(playout->U4_0, \
  1078. func(GetRegRawSimd(playout->I16_1))); \
  1079. break; \
  1080. }
  1081. #define PROCESS_SIMD_I16_1toU4_1(name, func) PROCESS_SIMD_I16_1toU4_1_COMMON(name, func,)
  1082. #define PROCESS_SIMD_U8_1toU4_1_COMMON(name, func, suffix)\
  1083. case OpCodeAsmJs::name: \
  1084. { \
  1085. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_1Uint16x8_1, suffix); \
  1086. SetRegRawSimd(playout->U4_0, \
  1087. func(GetRegRawSimd(playout->U8_1))); \
  1088. break; \
  1089. }
  1090. #define PROCESS_SIMD_U8_1toU4_1(name, func) PROCESS_SIMD_U8_1toU4_1_COMMON(name, func,)
  1091. #define PROCESS_SIMD_U16_1toU4_1_COMMON(name, func, suffix)\
  1092. case OpCodeAsmJs::name: \
  1093. { \
  1094. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_1Uint8x16_1, suffix); \
  1095. SetRegRawSimd(playout->U4_0, \
  1096. func(GetRegRawSimd(playout->U16_1))); \
  1097. break; \
  1098. }
  1099. #define PROCESS_SIMD_U16_1toU4_1(name, func) PROCESS_SIMD_U16_1toU4_1_COMMON(name, func,)
  1100. #define PROCESS_SIMD_F4_1toU8_1_COMMON(name, func, suffix)\
  1101. case OpCodeAsmJs::name: \
  1102. { \
  1103. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_1Float32x4_1, suffix); \
  1104. SetRegRawSimd(playout->U8_0, \
  1105. func(GetRegRawSimd(playout->F4_1))); \
  1106. break; \
  1107. }
  1108. #define PROCESS_SIMD_F4_1toU8_1(name, func) PROCESS_SIMD_F4_1toU8_1_COMMON(name, func,)
  1109. #define PROCESS_SIMD_I4_1toU8_1_COMMON(name, func, suffix)\
  1110. case OpCodeAsmJs::name: \
  1111. { \
  1112. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_1Int32x4_1, suffix); \
  1113. SetRegRawSimd(playout->U8_0, \
  1114. func(GetRegRawSimd(playout->I4_1))); \
  1115. break; \
  1116. }
  1117. #define PROCESS_SIMD_I4_1toU8_1(name, func) PROCESS_SIMD_I4_1toU8_1_COMMON(name, func,)
  1118. #define PROCESS_SIMD_I8_1toU8_1_COMMON(name, func, suffix)\
  1119. case OpCodeAsmJs::name: \
  1120. { \
  1121. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_1Int16x8_1, suffix); \
  1122. SetRegRawSimd(playout->U8_0, \
  1123. func(GetRegRawSimd(playout->I8_1))); \
  1124. break; \
  1125. }
  1126. #define PROCESS_SIMD_I8_1toU8_1(name, func) PROCESS_SIMD_I8_1toU8_1_COMMON(name, func,)
  1127. #define PROCESS_SIMD_I16_1toU8_1_COMMON(name, func, suffix)\
  1128. case OpCodeAsmJs::name: \
  1129. { \
  1130. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_1Int8x16_1, suffix); \
  1131. SetRegRawSimd(playout->U8_0, \
  1132. func(GetRegRawSimd(playout->I16_1))); \
  1133. break; \
  1134. }
  1135. #define PROCESS_SIMD_I16_1toU8_1(name, func) PROCESS_SIMD_I16_1toU8_1_COMMON(name, func,)
  1136. #define PROCESS_SIMD_U4_1toU8_1_COMMON(name, func, suffix)\
  1137. case OpCodeAsmJs::name: \
  1138. { \
  1139. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_1Uint32x4_1, suffix); \
  1140. SetRegRawSimd(playout->U8_0, \
  1141. func(GetRegRawSimd(playout->U4_1))); \
  1142. break; \
  1143. }
  1144. #define PROCESS_SIMD_U4_1toU8_1(name, func) PROCESS_SIMD_U4_1toU8_1_COMMON(name, func,)
  1145. #define PROCESS_SIMD_U16_1toU8_1_COMMON(name, func, suffix)\
  1146. case OpCodeAsmJs::name: \
  1147. { \
  1148. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_1Uint8x16_1, suffix); \
  1149. SetRegRawSimd(playout->U8_0, \
  1150. func(GetRegRawSimd(playout->U16_1))); \
  1151. break; \
  1152. }
  1153. #define PROCESS_SIMD_U16_1toU8_1(name, func) PROCESS_SIMD_U16_1toU8_1_COMMON(name, func,)
  1154. #define PROCESS_SIMD_F4_1toU16_1_COMMON(name, func, suffix)\
  1155. case OpCodeAsmJs::name: \
  1156. { \
  1157. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_1Float32x4_1, suffix); \
  1158. SetRegRawSimd(playout->U16_0, \
  1159. func(GetRegRawSimd(playout->F4_1))); \
  1160. break; \
  1161. }
  1162. #define PROCESS_SIMD_F4_1toU16_1(name, func) PROCESS_SIMD_F4_1toU16_1_COMMON(name, func,)
  1163. #define PROCESS_SIMD_I4_1toU16_1_COMMON(name, func, suffix)\
  1164. case OpCodeAsmJs::name: \
  1165. { \
  1166. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_1Int32x4_1, suffix); \
  1167. SetRegRawSimd(playout->U16_0, \
  1168. func(GetRegRawSimd(playout->I4_1))); \
  1169. break; \
  1170. }
  1171. #define PROCESS_SIMD_I4_1toU16_1(name, func) PROCESS_SIMD_I4_1toU16_1_COMMON(name, func,)
  1172. #define PROCESS_SIMD_I8_1toU16_1_COMMON(name, func, suffix)\
  1173. case OpCodeAsmJs::name: \
  1174. { \
  1175. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_1Int16x8_1, suffix); \
  1176. SetRegRawSimd(playout->U16_0, \
  1177. func(GetRegRawSimd(playout->I8_1))); \
  1178. break; \
  1179. }
  1180. #define PROCESS_SIMD_I8_1toU16_1(name, func) PROCESS_SIMD_I8_1toU16_1_COMMON(name, func,)
  1181. #define PROCESS_SIMD_I16_1toU16_1_COMMON(name, func, suffix)\
  1182. case OpCodeAsmJs::name: \
  1183. { \
  1184. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_1Int8x16_1, suffix); \
  1185. SetRegRawSimd(playout->U16_0, \
  1186. func(GetRegRawSimd(playout->I16_1))); \
  1187. break; \
  1188. }
  1189. #define PROCESS_SIMD_I16_1toU16_1(name, func) PROCESS_SIMD_I16_1toU16_1_COMMON(name, func,)
  1190. #define PROCESS_SIMD_U4_1toU16_1_COMMON(name, func, suffix)\
  1191. case OpCodeAsmJs::name: \
  1192. { \
  1193. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_1Uint32x4_1, suffix); \
  1194. SetRegRawSimd(playout->U16_0, \
  1195. func(GetRegRawSimd(playout->U4_1))); \
  1196. break; \
  1197. }
  1198. #define PROCESS_SIMD_U4_1toU16_1(name, func) PROCESS_SIMD_U4_1toU16_1_COMMON(name, func,)
  1199. #define PROCESS_SIMD_U8_1toU16_1_COMMON(name, func, suffix)\
  1200. case OpCodeAsmJs::name: \
  1201. { \
  1202. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_1Uint16x8_1, suffix); \
  1203. SetRegRawSimd(playout->U16_0, \
  1204. func(GetRegRawSimd(playout->U8_1))); \
  1205. break; \
  1206. }
  1207. #define PROCESS_SIMD_U8_1toU16_1(name, func) PROCESS_SIMD_U8_1toU16_1_COMMON(name, func,)
  1208. #define PROCESS_SIMD_F4_1toI16_1_COMMON(name, func, suffix)\
  1209. case OpCodeAsmJs::name: \
  1210. { \
  1211. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_1Float32x4_1, suffix); \
  1212. SetRegRawSimd(playout->I16_0, \
  1213. func(GetRegRawSimd(playout->F4_1))); \
  1214. break; \
  1215. }
  1216. #define PROCESS_SIMD_F4_1toI16_1(name, func, suffix) PROCESS_SIMD_F4_1toI16_1_COMMON(name, func, suffix)
  1217. #define PROCESS_SIMD_I4_1toI16_1_COMMON(name, func, suffix)\
  1218. case OpCodeAsmJs::name: \
  1219. { \
  1220. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_1Int32x4_1, suffix); \
  1221. SetRegRawSimd(playout->I16_0, \
  1222. func(GetRegRawSimd(playout->I4_1))); \
  1223. break; \
  1224. }
  1225. #define PROCESS_SIMD_I4_1toI16_1(name, func, suffix) PROCESS_SIMD_I4_1toI16_1_COMMON(name, func, suffix)
  1226. #define PROCESS_SIMD_I8_1toI16_1_COMMON(name, func, suffix)\
  1227. case OpCodeAsmJs::name: \
  1228. { \
  1229. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_1Int16x8_1, suffix); \
  1230. SetRegRawSimd(playout->I16_0, \
  1231. func(GetRegRawSimd(playout->I8_1))); \
  1232. break; \
  1233. }
  1234. #define PROCESS_SIMD_I8_1toI16_1(name, func) PROCESS_SIMD_I8_1toI16_1_COMMON(name, func,)
  1235. #define PROCESS_SIMD_U4_1toI16_1_COMMON(name, func, suffix)\
  1236. case OpCodeAsmJs::name: \
  1237. { \
  1238. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_1Uint32x4_1, suffix); \
  1239. SetRegRawSimd(playout->I16_0, \
  1240. func(GetRegRawSimd(playout->U4_1))); \
  1241. break; \
  1242. }
  1243. #define PROCESS_SIMD_U4_1toI16_1(name, func) PROCESS_SIMD_U4_1toI16_1_COMMON(name, func,)
  1244. #define PROCESS_SIMD_U8_1toI16_1_COMMON(name, func, suffix)\
  1245. case OpCodeAsmJs::name: \
  1246. { \
  1247. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_1Uint16x8_1, suffix); \
  1248. SetRegRawSimd(playout->I16_0, \
  1249. func(GetRegRawSimd(playout->U8_1))); \
  1250. break; \
  1251. }
  1252. #define PROCESS_SIMD_U8_1toI16_1(name, func) PROCESS_SIMD_U8_1toI16_1_COMMON(name, func,)
  1253. #define PROCESS_SIMD_U16_1toI16_1_COMMON(name, func, suffix)\
  1254. case OpCodeAsmJs::name: \
  1255. { \
  1256. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_1Uint8x16_1, suffix); \
  1257. SetRegRawSimd(playout->I16_0, \
  1258. func(GetRegRawSimd(playout->U16_1))); \
  1259. break; \
  1260. }
  1261. #define PROCESS_SIMD_U16_1toI16_1(name, func) PROCESS_SIMD_U16_1toI16_1_COMMON(name, func,)
  1262. #define PROCESS_SIMD_F4_1toD2_1_COMMON(name, func, suffix)\
  1263. case OpCodeAsmJs::name: \
  1264. { \
  1265. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_1Float32x4_1, suffix); \
  1266. SetRegRawSimd(playout->D2_0, \
  1267. func(GetRegRawSimd(playout->F4_1))); \
  1268. break; \
  1269. }
  1270. #define PROCESS_SIMD_F4_1toD2_1(name, func) PROCESS_SIMD_F4_1toD2_1_COMMON(name, func,)
  1271. #define PROCESS_SIMD_I4_1toD2_1_COMMON(name, func, suffix)\
  1272. case OpCodeAsmJs::name: \
  1273. { \
  1274. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_1Int32x4_1, suffix); \
  1275. SetRegRawSimd(playout->D2_0, \
  1276. func(GetRegRawSimd(playout->I4_1))); \
  1277. break; \
  1278. }
  1279. #define PROCESS_SIMD_I4_1toD2_1(name, func) PROCESS_SIMD_I4_1toD2_1_COMMON(name, func,)
  1280. // unary ops
  1281. #define PROCESS_SIMD_B4_1toI1_COMMON(name, func, suffix) \
  1282. case OpCodeAsmJs::name: \
  1283. { \
  1284. PROCESS_READ_LAYOUT_ASMJS(name, Int1Bool32x4_1, suffix); \
  1285. SetRegRawInt(playout->I0, func(GetRegRawSimd(playout->B4_1))); \
  1286. break; \
  1287. }
  1288. #define PROCESS_SIMD_B4_1toI1(name, func, suffix) PROCESS_SIMD_B4_1toI1_COMMON(name, func, suffix)
  1289. #define PROCESS_SIMD_B8_1toI1_COMMON(name, func, suffix) \
  1290. case OpCodeAsmJs::name: \
  1291. { \
  1292. PROCESS_READ_LAYOUT_ASMJS(name, Int1Bool16x8_1, suffix); \
  1293. SetRegRawInt(playout->I0, func(GetRegRawSimd(playout->B8_1))); \
  1294. break; \
  1295. }
  1296. #define PROCESS_SIMD_B8_1toI1(name, func, suffix) PROCESS_SIMD_B8_1toI1_COMMON(name, func, suffix)
  1297. #define PROCESS_SIMD_B16_1toI1_COMMON(name, func, suffix) \
  1298. case OpCodeAsmJs::name: \
  1299. { \
  1300. PROCESS_READ_LAYOUT_ASMJS(name, Int1Bool8x16_1, suffix); \
  1301. SetRegRawInt(playout->I0, func(GetRegRawSimd(playout->B16_1))); \
  1302. break; \
  1303. }
  1304. #define PROCESS_SIMD_B16_1toI1(name, func, suffix) PROCESS_SIMD_B16_1toI1_COMMON(name, func, suffix)
  1305. #define PROCESS_SIMD_D2_1I1D1toD2_1_COMMON(name, func, suffix) \
  1306. case OpCodeAsmJs::name: \
  1307. { \
  1308. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_2Int1Double1, suffix); \
  1309. SetRegRawSimd(playout->D2_0, func(GetRegRawSimd(playout->D2_1), GetRegRawInt(playout->I2), GetRegRawDouble(playout->D3))); \
  1310. break; \
  1311. }
  1312. #define PROCESS_SIMD_D2_1I1D1toD2_1_1(name, func) PROCESS_SIMD_D2_1I1D1toD2_1_COMMON(name, func, )
  1313. #define PROCESS_SIMD_F4_1toF4_1_COMMON(name, func, suffix) \
  1314. case OpCodeAsmJs::name: \
  1315. { \
  1316. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_2, suffix); \
  1317. SetRegRawSimd(playout->F4_0, func(GetRegRawSimd(playout->F4_1))); \
  1318. break; \
  1319. }
  1320. #define PROCESS_SIMD_F4_1toF4_1 (name, func) PROCESS_SIMD_F4_1toF4_1_COMMON(name, func,)
  1321. #define PROCESS_SIMD_I4_1toI4_1_COMMON(name, func, suffix) \
  1322. case OpCodeAsmJs::name: \
  1323. { \
  1324. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_2, suffix); \
  1325. SetRegRawSimd(playout->I4_0, func(GetRegRawSimd(playout->I4_1))); \
  1326. break; \
  1327. }
  1328. #define PROCESS_SIMD_I4_1toI4_1 (name, func) PROCESS_SIMD_I4_1toI4_1_COMMON(name, func,)
  1329. #define PROCESS_SIMD_B4_1toB4_1_COMMON(name, func, suffix) \
  1330. case OpCodeAsmJs::name: \
  1331. { \
  1332. PROCESS_READ_LAYOUT_ASMJS(name, Bool32x4_2, suffix); \
  1333. SetRegRawSimd(playout->B4_0, func(GetRegRawSimd(playout->B4_1))); \
  1334. break; \
  1335. }
  1336. #define PROCESS_SIMD_B4_1toB4_1 (name, func,) PROCESS_B4_1toB4_1_COMMON(name, func,)
  1337. #define PROCESS_SIMD_I8_1toI8_1_COMMON(name, func, suffix) \
  1338. case OpCodeAsmJs::name: \
  1339. { \
  1340. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_2, suffix); \
  1341. SetRegRawSimd(playout->I8_0, func(GetRegRawSimd(playout->I8_1))); \
  1342. break; \
  1343. }
  1344. #define PROCESS_SIMD_I8_1toI8_1 (name, func) PROCESS_SIMD_I8_1toI8_1_COMMON(name, func,)
  1345. #define PROCESS_SIMD_B8_1toB8_1_COMMON(name, func, suffix) \
  1346. case OpCodeAsmJs::name: \
  1347. { \
  1348. PROCESS_READ_LAYOUT_ASMJS(name, Bool16x8_2, suffix); \
  1349. SetRegRawSimd(playout->B8_0, func(GetRegRawSimd(playout->B8_1))); \
  1350. break; \
  1351. }
  1352. #define PROCESS_SIMD_B8_1toB8_1 (name, func,) PROCESS_B8_1toB8_1_COMMON(name, func,)
  1353. #define PROCESS_SIMD_B16_1toB16_1_COMMON(name, func, suffix) \
  1354. case OpCodeAsmJs::name: \
  1355. { \
  1356. PROCESS_READ_LAYOUT_ASMJS(name, Bool8x16_2, suffix); \
  1357. SetRegRawSimd(playout->B16_0, func(GetRegRawSimd(playout->B16_1))); \
  1358. break; \
  1359. }
  1360. #define PROCESS_SIMD_B16_1toB16_1 (name, func,) PROCESS_B16_1toB16_1_COMMON(name, func,)
  1361. #define PROCESS_SIMD_I16_1toI16_1_COMMON(name, func, suffix) \
  1362. case OpCodeAsmJs::name: \
  1363. { \
  1364. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_2, suffix); \
  1365. SetRegRawSimd(playout->I16_0, func(GetRegRawSimd(playout->I16_1))); \
  1366. break; \
  1367. }
  1368. #define PROCESS_SIMD_I16_1toI16_1 (name, func,) PROCESS_I16_1toI16_1_COMMON(name, func,)
  1369. #define PROCESS_SIMD_U4_1toU4_1_COMMON(name, func, suffix) \
  1370. case OpCodeAsmJs::name: \
  1371. { \
  1372. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_2, suffix); \
  1373. SetRegRawSimd(playout->U4_0, func(GetRegRawSimd(playout->U4_1))); \
  1374. break; \
  1375. }
  1376. #define PROCESS_SIMD_U4_1toU4_1 (name, func) PROCESS_SIMD_U4_1toU4_1_COMMON(name, func,)
  1377. #define PROCESS_SIMD_U8_1toU8_1_COMMON(name, func, suffix) \
  1378. case OpCodeAsmJs::name: \
  1379. { \
  1380. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_2, suffix); \
  1381. SetRegRawSimd(playout->U8_0, func(GetRegRawSimd(playout->U8_1))); \
  1382. break; \
  1383. }
  1384. #define PROCESS_SIMD_U8_1toU8_1(name, func) PROCESS_SIMD_U8_1toU8_1_COMMON(name, func,)
  1385. #define PROCESS_SIMD_U16_1toU16_1_COMMON(name, func, suffix) \
  1386. case OpCodeAsmJs::name: \
  1387. { \
  1388. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_2, suffix); \
  1389. SetRegRawSimd(playout->U16_0, func(GetRegRawSimd(playout->U16_1))); \
  1390. break; \
  1391. }
  1392. #define PROCESS_SIMD_U16_1toU16_1(name, func) PROCESS_SIMD_U16_1toU16_1_COMMON(name, func,)
  1393. #define PROCESS_SIMD_D2_1toD2_1_COMMON(name, func, suffix) \
  1394. case OpCodeAsmJs::name: \
  1395. { \
  1396. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_2, suffix); \
  1397. SetRegRawSimd(playout->D2_0, func(GetRegRawSimd(playout->D2_1))); \
  1398. break; \
  1399. }
  1400. #define PROCESS_SIMD_D2_1toD2_1 (name, func) PROCESS_SIMD_D2_1toD2_1_COMMON(name, func,)
  1401. // binary ops
  1402. #define PROCESS_SIMD_F4_2toF4_1_COMMON(name, func, suffix) \
  1403. case OpCodeAsmJs::name: \
  1404. { \
  1405. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_3, suffix); \
  1406. SetRegRawSimd(playout->F4_0, func(GetRegRawSimd(playout->F4_1), GetRegRawSimd(playout->F4_2))); \
  1407. break; \
  1408. }
  1409. #define PROCESS_SIMD_F4_2toF4_1(name, func) PROCESS_SIMD_F4_2toF4_1_COMMON(name, func,)
  1410. #define PROCESS_SIMD_F4_2toB4_1_COMMON(name, func, suffix) \
  1411. case OpCodeAsmJs::name: \
  1412. { \
  1413. PROCESS_READ_LAYOUT_ASMJS(name, Bool32x4_1Float32x4_2, suffix); \
  1414. SetRegRawSimd(playout->B4_0, func(GetRegRawSimd(playout->F4_1), GetRegRawSimd(playout->F4_2))); \
  1415. break; \
  1416. }
  1417. #define PROCESS_SIMD_F4_2toB4_1(name, func) PROCESS_SIMD_F4_2toB4_1_COMMON(name, func,)
  1418. #define PROCESS_SIMD_I4_3toI4_1_COMMON(name, func, suffix) \
  1419. case OpCodeAsmJs::name: \
  1420. { \
  1421. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_4, suffix); \
  1422. SetRegRawSimd(playout->I4_0, func(GetRegRawSimd(playout->I4_1), GetRegRawSimd(playout->I4_2), GetRegRawSimd(playout->I4_3))); \
  1423. break; \
  1424. }
  1425. #define PROCESS_SIMD_I4_3toI4_1(name, func) PROCESS_SIMD_I4_3toI4_1_COMMON(name, func,)
  1426. #define PROCESS_SIMD_I4_2toI4_1_COMMON(name, func, suffix) \
  1427. case OpCodeAsmJs::name: \
  1428. { \
  1429. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_3, suffix); \
  1430. SetRegRawSimd(playout->I4_0, func(GetRegRawSimd(playout->I4_1), GetRegRawSimd(playout->I4_2))); \
  1431. break; \
  1432. }
  1433. #define PROCESS_SIMD_I4_2toI4_1(name, func) PROCESS_SIMD_I4_2toI4_1_COMMON(name, func,)
  1434. #define PROCESS_SIMD_I4_2toB4_1_COMMON(name, func, suffix) \
  1435. case OpCodeAsmJs::name: \
  1436. { \
  1437. PROCESS_READ_LAYOUT_ASMJS(name, Bool32x4_1Int32x4_2, suffix); \
  1438. SetRegRawSimd(playout->B4_0, func(GetRegRawSimd(playout->I4_1), GetRegRawSimd(playout->I4_2))); \
  1439. break; \
  1440. }
  1441. #define PROCESS_SIMD_I4_2toB4_1(name, func) PROCESS_SIMD_I4_2toB4_1_COMMON(name, func,)
  1442. #define PROCESS_SIMD_B4_2toB4_1_COMMON(name, func, suffix) \
  1443. case OpCodeAsmJs::name: \
  1444. { \
  1445. PROCESS_READ_LAYOUT_ASMJS(name, Bool32x4_3, suffix); \
  1446. SetRegRawSimd(playout->B4_0, func(GetRegRawSimd(playout->B4_1), GetRegRawSimd(playout->B4_2))); \
  1447. break; \
  1448. }
  1449. #define PROCESS_SIMD_B4_2toB4_1(name, func, suffix) PROCESS_SIMD_B4_2toB4_1_COMMON(name, func, suffix)
  1450. #define PROCESS_SIMD_B8_2toB8_1_COMMON(name, func, suffix) \
  1451. case OpCodeAsmJs::name: \
  1452. { \
  1453. PROCESS_READ_LAYOUT_ASMJS(name, Bool16x8_3, suffix); \
  1454. SetRegRawSimd(playout->B8_0, func(GetRegRawSimd(playout->B8_1), GetRegRawSimd(playout->B8_2))); \
  1455. break; \
  1456. }
  1457. #define PROCESS_SIMD_B8_2toB8_1(name, func, suffix) PROCESS_SIMD_B8_2toB8_1_COMMON(name, func, suffix)
  1458. #define PROCESS_SIMD_B16_2toB16_1_COMMON(name, func, suffix) \
  1459. case OpCodeAsmJs::name: \
  1460. { \
  1461. PROCESS_READ_LAYOUT_ASMJS(name, Bool8x16_3, suffix); \
  1462. SetRegRawSimd(playout->B16_0, func(GetRegRawSimd(playout->B16_1), GetRegRawSimd(playout->B16_2))); \
  1463. break; \
  1464. }
  1465. #define PROCESS_SIMD_B16_2toB16_1(name, func, suffix) PROCESS_SIMD_B16_2toB16_1_COMMON(name, func, suffix)
  1466. #define PROCESS_SIMD_I16_2toI16_1_COMMON(name, func, suffix) \
  1467. case OpCodeAsmJs::name: \
  1468. { \
  1469. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_3, suffix); \
  1470. SetRegRawSimd(playout->I16_0, func(GetRegRawSimd(playout->I16_1), GetRegRawSimd(playout->I16_2))); \
  1471. break; \
  1472. }
  1473. #define PROCESS_SIMD_I16_2toI16_1(name, func, suffix) PROCESS_SIMD_I16_2toI16_1_COMMON(name, func, suffix)
  1474. #define PROCESS_SIMD_I16_2toB16_1_COMMON(name, func, suffix) \
  1475. case OpCodeAsmJs::name: \
  1476. { \
  1477. PROCESS_READ_LAYOUT_ASMJS(name, Bool8x16_1Int8x16_2, suffix); \
  1478. SetRegRawSimd(playout->B16_0, func(GetRegRawSimd(playout->I16_1), GetRegRawSimd(playout->I16_2))); \
  1479. break; \
  1480. }
  1481. #define PROCESS_SIMD_I16_2toB16_1(name, func) PROCESS_SIMD_I16_2toB16_1_COMMON(name, func,)
  1482. #define PROCESS_SIMD_I8_2toI8_1_COMMON(name, func, suffix) \
  1483. case OpCodeAsmJs::name: \
  1484. { \
  1485. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_3, suffix); \
  1486. SetRegRawSimd(playout->I8_0, func(GetRegRawSimd(playout->I8_1), GetRegRawSimd(playout->I8_2))); \
  1487. break; \
  1488. }
  1489. #define PROCESS_SIMD_I8_2toI8_1(name, func) PROCESS_SIMD_I8_2toI8_1_COMMON(name, func,)
  1490. #define PROCESS_SIMD_I8_2toB8_1_COMMON(name, func, suffix) \
  1491. case OpCodeAsmJs::name: \
  1492. { \
  1493. PROCESS_READ_LAYOUT_ASMJS(name, Bool16x8_1Int16x8_2, suffix); \
  1494. SetRegRawSimd(playout->B8_0, func(GetRegRawSimd(playout->I8_1), GetRegRawSimd(playout->I8_2))); \
  1495. break; \
  1496. }
  1497. #define PROCESS_SIMD_I8_2toB8_1(name, func) PROCESS_SIMD_I8_2toB8_1_COMMON(name, func,)
  1498. #define PROCESS_SIMD_U4_2toU4_1_COMMON(name, func, suffix) \
  1499. case OpCodeAsmJs::name: \
  1500. { \
  1501. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_3, suffix); \
  1502. SetRegRawSimd(playout->U4_0, func(GetRegRawSimd(playout->U4_1), GetRegRawSimd(playout->U4_2))); \
  1503. break; \
  1504. }
  1505. #define PROCESS_SIMD_U4_2toU4_1(name, func) PROCESS_SIMD_U4_2toU4_1_COMMON(name, func,)
  1506. #define PROCESS_SIMD_U4_2toB4_1_COMMON(name, func, suffix) \
  1507. case OpCodeAsmJs::name: \
  1508. { \
  1509. PROCESS_READ_LAYOUT_ASMJS(name, Bool32x4_1Uint32x4_2, suffix); \
  1510. SetRegRawSimd(playout->B4_0, func(GetRegRawSimd(playout->U4_1), GetRegRawSimd(playout->U4_2))); \
  1511. break; \
  1512. }
  1513. #define PROCESS_SIMD_U4_2toB4_1(name, func) PROCESS_SIMD_U4_2toB4_1_COMMON(name, func,)
  1514. #define PROCESS_SIMD_U8_2toU8_1_COMMON(name, func, suffix) \
  1515. case OpCodeAsmJs::name: \
  1516. { \
  1517. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_3, suffix); \
  1518. SetRegRawSimd(playout->U8_0, func(GetRegRawSimd(playout->U8_1), GetRegRawSimd(playout->U8_2))); \
  1519. break; \
  1520. }
  1521. #define PROCESS_SIMD_U8_2toU8_1(name, func) PROCESS_SIMD_U8_2toU8_1_COMMON(name, func,)
  1522. #define PROCESS_SIMD_U8_2toB8_1_COMMON(name, func, suffix) \
  1523. case OpCodeAsmJs::name: \
  1524. { \
  1525. PROCESS_READ_LAYOUT_ASMJS(name, Bool16x8_1Uint16x8_2, suffix); \
  1526. SetRegRawSimd(playout->B8_0, func(GetRegRawSimd(playout->U8_1), GetRegRawSimd(playout->U8_2))); \
  1527. break; \
  1528. }
  1529. #define PROCESS_SIMD_U8_2toB8_1(name, func) PROCESS_SIMD_U8_2toB8_1_COMMON(name, func,)
  1530. #define PROCESS_SIMD_U16_2toU16_1_COMMON(name, func, suffix) \
  1531. case OpCodeAsmJs::name: \
  1532. { \
  1533. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_3, suffix); \
  1534. SetRegRawSimd(playout->U16_0, func(GetRegRawSimd(playout->U16_1), GetRegRawSimd(playout->U16_2))); \
  1535. break; \
  1536. }
  1537. #define PROCESS_SIMD_U16_2toU16_1(name, func) PROCESS_SIMD_U16_2toU16_1_COMMON(name, func,)
  1538. #define PROCESS_SIMD_U16_2toB16_1_COMMON(name, func, suffix) \
  1539. case OpCodeAsmJs::name: \
  1540. { \
  1541. PROCESS_READ_LAYOUT_ASMJS(name, Bool8x16_1Uint8x16_2, suffix); \
  1542. SetRegRawSimd(playout->B16_0, func(GetRegRawSimd(playout->U16_1), GetRegRawSimd(playout->U16_2))); \
  1543. break; \
  1544. }
  1545. #define PROCESS_SIMD_U16_2toB16_1(name, func) PROCESS_SIMD_U16_2toB16_1_COMMON(name, func,)
  1546. #define PROCESS_SIMD_D2_2toD2_1_COMMON(name, func, suffix) \
  1547. case OpCodeAsmJs::name: \
  1548. { \
  1549. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_3, suffix); \
  1550. SetRegRawSimd(playout->D2_0, func(GetRegRawSimd(playout->D2_1), GetRegRawSimd(playout->D2_2))); \
  1551. break; \
  1552. }
  1553. #define PROCESS_SIMD_D2_2toD2_1(name, func) PROCESS_SIMD_D2_2toD2_1_COMMON(name, func,)
  1554. // ternary
  1555. #define PROCESS_SIMD_F4_3toF4_1_COMMON(name, func, suffix) \
  1556. case OpCodeAsmJs::name: \
  1557. { \
  1558. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_4, suffix); \
  1559. SetRegRawSimd(playout->F4_0, func(GetRegRawSimd(playout->F4_1), GetRegRawSimd(playout->F4_2), GetRegRawSimd(playout->F4_3))); \
  1560. break; \
  1561. }
  1562. #define PROCESS_SIMD_F4_3toF4_1(name, func) PROCESS_SIMD_F4_3toF4_1_COMMON(name, func,)
  1563. #define PROCESS_SIMD_B4_1I4_2toI4_1_COMMON(name, func, suffix) \
  1564. case OpCodeAsmJs::name: \
  1565. { \
  1566. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_1Bool32x4_1Int32x4_2, suffix); \
  1567. SetRegRawSimd(playout->I4_0, func(GetRegRawSimd(playout->B4_1), GetRegRawSimd(playout->I4_2), GetRegRawSimd(playout->I4_3))); \
  1568. break; \
  1569. }
  1570. #define PROCESS_SIMD_B4_1I4_2toI4_1(name, func) PROCESS_SIMD_B4_1I4_2toI4_1_COMMON(name, func,)
  1571. #define PROCESS_SIMD_B8_1I8_2toI8_1_COMMON(name, func, suffix) \
  1572. case OpCodeAsmJs::name: \
  1573. { \
  1574. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_1Bool16x8_1Int16x8_2, suffix); \
  1575. SetRegRawSimd(playout->I8_0, func(GetRegRawSimd(playout->B8_1), GetRegRawSimd(playout->I8_2), GetRegRawSimd(playout->I8_3))); \
  1576. break; \
  1577. }
  1578. #define PROCESS_SIMD_B8_1I8_2toI8_1(name, func) PROCESS_SIMD_B8_1I8_2toI8_1_COMMON(name, func,)
  1579. #define PROCESS_SIMD_B16_1I16_2toI16_1_COMMON(name, func, suffix) \
  1580. case OpCodeAsmJs::name: \
  1581. { \
  1582. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_1Bool8x16_1Int8x16_2, suffix); \
  1583. SetRegRawSimd(playout->I16_0, func(GetRegRawSimd(playout->B16_1), GetRegRawSimd(playout->I16_2), GetRegRawSimd(playout->I16_3))); \
  1584. break; \
  1585. }
  1586. #define PROCESS_SIMD_B16_1I16_2toI16_1(name, func) PROCESS_SIMD_B16_1I16_2toI16_1_COMMON(name, func,)
  1587. #define PROCESS_SIMD_B4_1U4_2toU4_1_COMMON(name, func, suffix) \
  1588. case OpCodeAsmJs::name: \
  1589. { \
  1590. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_1Bool32x4_1Uint32x4_2, suffix); \
  1591. SetRegRawSimd(playout->U4_0, func(GetRegRawSimd(playout->B4_1), GetRegRawSimd(playout->U4_2), GetRegRawSimd(playout->U4_3))); \
  1592. break; \
  1593. }
  1594. #define PROCESS_SIMD_B4_1U4_2toU4_1(name, func) PROCESS_SIMD_B4_1U4_2toU4_1_COMMON(name, func,)
  1595. #define PROCESS_SIMD_B8_1U8_2toU8_1_COMMON(name, func, suffix) \
  1596. case OpCodeAsmJs::name: \
  1597. { \
  1598. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_1Bool16x8_1Uint16x8_2, suffix); \
  1599. SetRegRawSimd(playout->U8_0, func(GetRegRawSimd(playout->B8_1), GetRegRawSimd(playout->U8_2), GetRegRawSimd(playout->U8_3))); \
  1600. break; \
  1601. }
  1602. #define PROCESS_SIMD_B8_1U8_2toU8_1(name, func) PROCESS_SIMD_B8_1U8_2toU8_1_COMMON(name, func,)
  1603. #define PROCESS_SIMD_B16_1U16_2toU16_1_COMMON(name, func, suffix) \
  1604. case OpCodeAsmJs::name: \
  1605. { \
  1606. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_1Bool8x16_1Uint8x16_2, suffix); \
  1607. SetRegRawSimd(playout->U16_0, func(GetRegRawSimd(playout->B16_1), GetRegRawSimd(playout->U16_2), GetRegRawSimd(playout->U16_3))); \
  1608. break; \
  1609. }
  1610. #define PROCESS_SIMD_B16_1U16_2toU16_1(name, func) PROCESS_SIMD_B16_1U16_2toU16_1_COMMON(name, func,)
  1611. #define PROCESS_SIMD_D2_3toD2_1_COMMON(name, func, suffix) \
  1612. case OpCodeAsmJs::name: \
  1613. { \
  1614. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_4, suffix); \
  1615. SetRegRawSimd(playout->D2_0, func(GetRegRawSimd(playout->D2_1), GetRegRawSimd(playout->D2_2), GetRegRawSimd(playout->D2_3))); \
  1616. break; \
  1617. }
  1618. #define PROCESS_SIMD_D2_3toD2_1(name, func) PROCESS_SIMD_D2_3toD2_1_COMMON(name, func,)
  1619. #define PROCESS_SIMD_B4_1F4_2toF4_1_COMMON(name, func, suffix) \
  1620. case OpCodeAsmJs::name: \
  1621. { \
  1622. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_1Bool32x4_1Float32x4_2, suffix); \
  1623. SetRegRawSimd(playout->F4_0, func(GetRegRawSimd(playout->B4_1), GetRegRawSimd(playout->F4_2), GetRegRawSimd(playout->F4_3))); \
  1624. break; \
  1625. }
  1626. #define PROCESS_SIMD_B4_1F4_2toF4_1(name, func) PROCESS_SIMD_B4_1F4_2toF4_1_COMMON(name, func,)
  1627. #define PROCESS_SIMD_I4_1D2_2toD2_1_COMMON(name, func, suffix) \
  1628. case OpCodeAsmJs::name: \
  1629. { \
  1630. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_1Int32x4_1Float64x2_2, suffix); \
  1631. SetRegRawSimd(playout->D2_0, func(GetRegRawSimd(playout->I4_1), GetRegRawSimd(playout->D2_2), GetRegRawSimd(playout->D2_3))); \
  1632. break; \
  1633. }
  1634. #define PROCESS_SIMD_I4_1D2_2toD2_1(name, func) PROCESS_SIMD_I4_1D2_2toD2_1_COMMON(name, func,)
  1635. // Extract Lane
  1636. #define PROCESS_SIMD_F4_1I1toF1_COMMON(name, func, suffix) \
  1637. case OpCodeAsmJs::name: \
  1638. { \
  1639. PROCESS_READ_LAYOUT_ASMJS(name, Float1Float32x4_1Int1, suffix); \
  1640. SetRegRawFloat(playout->F0, func(GetRegRawSimd(playout->F4_1), GetRegRawInt(playout->I2))); \
  1641. break; \
  1642. }
  1643. #define PROCESS_SIMD_F4_1I1toF1(name, func) PROCESS_SIMD_F4_1I1toF1_COMMON(name, func,)
  1644. #define PROCESS_SIMD_I4_1I1toI1_COMMON(name, func, suffix) \
  1645. case OpCodeAsmJs::name: \
  1646. { \
  1647. PROCESS_READ_LAYOUT_ASMJS(name, Int1Int32x4_1Int1, suffix); \
  1648. SetRegRawInt(playout->I0, func(GetRegRawSimd(playout->I4_1), GetRegRawInt(playout->I2))); \
  1649. break; \
  1650. }
  1651. #define PROCESS_SIMD_I4_1I1toI1(name, func) PROCESS_SIMD_I4_1I1toI1_COMMON(name, func,)
  1652. #define PROCESS_SIMD_I8_1I1toI1_COMMON(name, func, suffix) \
  1653. case OpCodeAsmJs::name: \
  1654. { \
  1655. PROCESS_READ_LAYOUT_ASMJS(name, Int1Int16x8_1Int1, suffix); \
  1656. SetRegRawInt(playout->I0, func(GetRegRawSimd(playout->I8_1), GetRegRawInt(playout->I2))); \
  1657. break; \
  1658. }
  1659. #define PROCESS_SIMD_I8_1I1toI1(name, func) PROCESS_SIMD_I8_1I1toI1_COMMON(name, func,)
  1660. #define PROCESS_SIMD_I16_1I1toI1_COMMON(name, func, suffix) \
  1661. case OpCodeAsmJs::name: \
  1662. { \
  1663. PROCESS_READ_LAYOUT_ASMJS(name, Int1Int8x16_1Int1, suffix); \
  1664. SetRegRawInt(playout->I0, func(GetRegRawSimd(playout->I16_1), GetRegRawInt(playout->I2))); \
  1665. break; \
  1666. }
  1667. #define PROCESS_SIMD_I16_1I1toI1(name, func, suffix) PROCESS_SIMD_I16_1I1toI1_COMMON(name, func, suffix)
  1668. #define PROCESS_SIMD_U4_1I1toI1_COMMON(name, func, suffix) \
  1669. case OpCodeAsmJs::name: \
  1670. { \
  1671. PROCESS_READ_LAYOUT_ASMJS(name, Int1Uint32x4_1Int1, suffix); \
  1672. SetRegRawInt(playout->I0, func(GetRegRawSimd(playout->U4_1), GetRegRawInt(playout->I2))); \
  1673. break; \
  1674. }
  1675. #define PROCESS_SIMD_U4_1I1toI1(name, func) PROCESS_SIMD_U4_1I1toI1_COMMON(name, func,)
  1676. #define PROCESS_SIMD_U8_1I1toI1_COMMON(name, func, suffix) \
  1677. case OpCodeAsmJs::name: \
  1678. { \
  1679. PROCESS_READ_LAYOUT_ASMJS(name, Int1Uint16x8_1Int1, suffix); \
  1680. SetRegRawInt(playout->I0, (uint16)func(GetRegRawSimd(playout->U8_1), GetRegRawInt(playout->I2))); \
  1681. break; \
  1682. }
  1683. #define PROCESS_SIMD_U8_1I1toI1(name, func) PROCESS_SIMD_U8_1I1toI1_COMMON(name, func,)
  1684. #define PROCESS_SIMD_U16_1I1toI1_COMMON(name, func, suffix) \
  1685. case OpCodeAsmJs::name: \
  1686. { \
  1687. PROCESS_READ_LAYOUT_ASMJS(name, Int1Uint8x16_1Int1, suffix); \
  1688. SetRegRawInt(playout->I0, (uint8)func(GetRegRawSimd(playout->U16_1), GetRegRawInt(playout->I2))); \
  1689. break; \
  1690. }
  1691. #define PROCESS_SIMD_U16_1I1toI1(name, func) PROCESS_SIMD_U16_1I1toI1_COMMON(name, func,)
  1692. #define PROCESS_SIMD_B4_1I1toI1_COMMON(name, func, suffix) \
  1693. case OpCodeAsmJs::name: \
  1694. { \
  1695. PROCESS_READ_LAYOUT_ASMJS(name, Int1Bool32x4_1Int1, suffix); \
  1696. SetRegRawInt(playout->I0, func(GetRegRawSimd(playout->B4_1), GetRegRawInt(playout->I2))); \
  1697. break; \
  1698. }
  1699. #define PROCESS_SIMD_B4_1I1toI1(name, func) PROCESS_SIMD_B4_1I1toI1_COMMON(name, func,)
  1700. #define PROCESS_SIMD_B8_1I1toI1_COMMON(name, func, suffix) \
  1701. case OpCodeAsmJs::name: \
  1702. { \
  1703. PROCESS_READ_LAYOUT_ASMJS(name, Int1Bool16x8_1Int1, suffix); \
  1704. SetRegRawInt(playout->I0, (uint16)func(GetRegRawSimd(playout->B8_1), GetRegRawInt(playout->I2))); \
  1705. break; \
  1706. }
  1707. #define PROCESS_SIMD_B8_1I1toI1(name, func) PROCESS_SIMD_B8_1I1toI1_COMMON(name, func,)
  1708. #define PROCESS_SIMD_B16_1I1toI1_COMMON(name, func, suffix) \
  1709. case OpCodeAsmJs::name: \
  1710. { \
  1711. PROCESS_READ_LAYOUT_ASMJS(name, Int1Bool8x16_1Int1, suffix); \
  1712. SetRegRawInt(playout->I0, (uint8)func(GetRegRawSimd(playout->B16_1), GetRegRawInt(playout->I2))); \
  1713. break; \
  1714. }
  1715. #define PROCESS_SIMD_B16_1I1toI1(name, func) PROCESS_SIMD_B16_1I1toI1_COMMON(name, func,)
  1716. // Replace Lane
  1717. #define PROCESS_SIMD_I4_1I2toI4_1_COMMON(name, func, suffix) \
  1718. case OpCodeAsmJs::name: \
  1719. { \
  1720. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_2Int2, suffix); \
  1721. SetRegRawSimd(playout->I4_0, func(GetRegRawSimd(playout->I4_1), GetRegRawInt(playout->I2), GetRegRawInt(playout->I3))); \
  1722. break; \
  1723. }
  1724. #define PROCESS_SIMD_I4_1I2toI4_1(name, func) PROCESS_SIMD_I4_1I2toI4_1_COMMON(name, func,)
  1725. #define PROCESS_SIMD_I16_1I2toI16_1_COMMON(name, func, suffix) \
  1726. case OpCodeAsmJs::name: \
  1727. { \
  1728. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_2Int2, suffix); \
  1729. SetRegRawSimd(playout->I16_0, func(GetRegRawSimd(playout->I16_1), GetRegRawInt(playout->I2), static_cast<int8>(GetRegRawInt(playout->I3)))); \
  1730. break; \
  1731. }
  1732. #define PROCESS_SIMD_I16_1I2toI16_1(name, func, suffix) PROCESS_SIMD_I16_1I2toI16_1_COMMON(name, func, suffix)
  1733. #define PROCESS_SIMD_F4_1I1F1toF4_1_COMMON(name, func, suffix) \
  1734. case OpCodeAsmJs::name: \
  1735. { \
  1736. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_2Int1Float1, suffix); \
  1737. SetRegRawSimd(playout->F4_0, func(GetRegRawSimd(playout->F4_1), GetRegRawInt(playout->I2), GetRegRawFloat(playout->F3))); \
  1738. break; \
  1739. }
  1740. #define PROCESS_SIMD_F4_1I1F1toF4_1_1(name, func) PROCESS_SIMD_F4_1I1F1toF4_1_COMMON(name, func,)
  1741. #define PROCESS_SIMD_I8_1I2toI8_1_COMMON(name, func, suffix) \
  1742. case OpCodeAsmJs::name: \
  1743. { \
  1744. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_2Int2, suffix); \
  1745. SetRegRawSimd(playout->I8_0, func(GetRegRawSimd(playout->I8_1), GetRegRawInt(playout->I2), (int16)GetRegRawInt(playout->I3))); \
  1746. break; \
  1747. }
  1748. #define PROCESS_SIMD_I8_1I2toI8_1(name, func) PROCESS_SIMD_I8_1I2toI8_1_COMMON(name, func,)
  1749. #define PROCESS_SIMD_U4_1I2toU4_1_COMMON(name, func, suffix) \
  1750. case OpCodeAsmJs::name: \
  1751. { \
  1752. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_2Int2, suffix); \
  1753. SetRegRawSimd(playout->U4_0, func(GetRegRawSimd(playout->U4_1), GetRegRawInt(playout->I2), (uint32)GetRegRawInt(playout->I3))); \
  1754. break; \
  1755. }
  1756. #define PROCESS_SIMD_U4_1I2toU4_1(name, func) PROCESS_SIMD_U4_1I2toU4_1_COMMON(name, func,)
  1757. #define PROCESS_SIMD_U8_1I2toU8_1_COMMON(name, func, suffix) \
  1758. case OpCodeAsmJs::name: \
  1759. { \
  1760. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_2Int2, suffix); \
  1761. SetRegRawSimd(playout->U8_0, func(GetRegRawSimd(playout->U8_1), GetRegRawInt(playout->I2), (uint16)GetRegRawInt(playout->I3))); \
  1762. break; \
  1763. }
  1764. #define PROCESS_SIMD_U8_1I2toU8_1(name, func) PROCESS_SIMD_U8_1I2toU8_1_COMMON(name, func,)
  1765. #define PROCESS_SIMD_U16_1I2toU16_1_COMMON(name, func, suffix) \
  1766. case OpCodeAsmJs::name: \
  1767. { \
  1768. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_2Int2, suffix); \
  1769. SetRegRawSimd(playout->U16_0, func(GetRegRawSimd(playout->U16_1), GetRegRawInt(playout->I2), (uint8)GetRegRawInt(playout->I3))); \
  1770. break; \
  1771. }
  1772. #define PROCESS_SIMD_U16_1I2toU16_1_1(name, func) PROCESS_SIMD_U16_1I2toU16_1_COMMON(name, func,)
  1773. #define PROCESS_SIMD_B4_1I2toB4_1_COMMON(name, func, suffix) \
  1774. case OpCodeAsmJs::name: \
  1775. { \
  1776. PROCESS_READ_LAYOUT_ASMJS(name, Bool32x4_2Int2, suffix); \
  1777. SetRegRawSimd(playout->B4_0, func(GetRegRawSimd(playout->B4_1), GetRegRawInt(playout->I2), (GetRegRawInt(playout->I3)) ? -1 : 0)); \
  1778. break; \
  1779. }
  1780. #define PROCESS_SIMD_B4_1I2toB4_1(name, func) PROCESS_SIMD_B4_1I2toB4_1_COMMON(name, func,)
  1781. #define PROCESS_SIMD_B8_1I2toB8_1_COMMON(name, func, suffix) \
  1782. case OpCodeAsmJs::name: \
  1783. { \
  1784. PROCESS_READ_LAYOUT_ASMJS(name, Bool16x8_2Int2, suffix); \
  1785. SetRegRawSimd(playout->B8_0, func(GetRegRawSimd(playout->B8_1), GetRegRawInt(playout->I2), (GetRegRawInt(playout->I3)) ? -1 : 0)); \
  1786. break; \
  1787. }
  1788. #define PROCESS_SIMD_B8_1I2toB8_1(name, func) PROCESS_SIMD_B8_1I2toB8_1_COMMON(name, func,)
  1789. #define PROCESS_SIMD_B16_1I2toB16_1_COMMON(name, func, suffix) \
  1790. case OpCodeAsmJs::name: \
  1791. { \
  1792. PROCESS_READ_LAYOUT_ASMJS(name, Bool8x16_2Int2, suffix); \
  1793. SetRegRawSimd(playout->B16_0, func(GetRegRawSimd(playout->B16_1), GetRegRawInt(playout->I2), (GetRegRawInt(playout->I3)) ? -1 : 0)); \
  1794. break; \
  1795. }
  1796. #define PROCESS_SIMD_B16_1I2toB16_1_1(name, func) PROCESS_SIMD_B16_1I2toB16_1_COMMON(name, func,)
  1797. // f4swizzle
  1798. #define PROCESS_SIMD_F4_1I4toF4_1_COMMON(name, func, suffix) \
  1799. case OpCodeAsmJs::name: \
  1800. { \
  1801. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_2Int4, suffix); \
  1802. uint32 lanes[4]; \
  1803. lanes[0] = GetRegRawInt(playout->I2); lanes[1] = GetRegRawInt(playout->I3); \
  1804. lanes[2] = GetRegRawInt(playout->I4); lanes[3] = GetRegRawInt(playout->I5); \
  1805. SetRegRawSimd(playout->F4_0, func(GetRegRawSimd(playout->F4_1), GetRegRawSimd(playout->F4_1), 4, lanes)); \
  1806. break; \
  1807. }
  1808. #define PROCESS_SIMD_F4_1I4toF4_1(name, func) PROCESS_SIMD_F4_1I4toF4_1_COMMON(name, func,)
  1809. // f4shuffle
  1810. #define PROCESS_SIMD_F4_2I4toF4_1_COMMON(name, func, suffix) \
  1811. case OpCodeAsmJs::name: \
  1812. { \
  1813. PROCESS_READ_LAYOUT_ASMJS(name, Float32x4_3Int4, suffix); \
  1814. uint32 lanes[4]; \
  1815. lanes[0] = GetRegRawInt(playout->I3); lanes[1] = GetRegRawInt(playout->I4); \
  1816. lanes[2] = GetRegRawInt(playout->I5); lanes[3] = GetRegRawInt(playout->I6); \
  1817. SetRegRawSimd(playout->F4_0, func(GetRegRawSimd(playout->F4_1), GetRegRawSimd(playout->F4_2), 4, lanes)); \
  1818. break; \
  1819. }
  1820. #define PROCESS_SIMD_F4_1I4toF4_1(name, func) PROCESS_SIMD_F4_1I4toF4_1_COMMON(name, func,)
  1821. // i4swizzle
  1822. #define PROCESS_SIMD_I4_1I4toI4_1_COMMON(name, func, suffix) \
  1823. case OpCodeAsmJs::name: \
  1824. { \
  1825. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_2Int4, suffix); \
  1826. uint32 lanes[4]; \
  1827. lanes[0] = GetRegRawInt(playout->I2); lanes[1] = GetRegRawInt(playout->I3); \
  1828. lanes[2] = GetRegRawInt(playout->I4); lanes[3] = GetRegRawInt(playout->I5); \
  1829. SetRegRawSimd(playout->I4_0, func(GetRegRawSimd(playout->I4_1), GetRegRawSimd(playout->I4_1), 4, lanes)); \
  1830. break; \
  1831. }
  1832. #define PROCESS_SIMD_I4_1I4toI4_1(name, func) PROCESS_SIMD_I4_1I4toI4_1_COMMON(name, func,)
  1833. // i4shuffle
  1834. #define PROCESS_SIMD_I4_2I4toI4_1_COMMON(name, func, suffix) \
  1835. case OpCodeAsmJs::name: \
  1836. { \
  1837. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_3Int4, suffix); \
  1838. uint32 lanes[4]; \
  1839. lanes[0] = GetRegRawInt(playout->I3); lanes[1] = GetRegRawInt(playout->I4); \
  1840. lanes[2] = GetRegRawInt(playout->I5); lanes[3] = GetRegRawInt(playout->I6); \
  1841. SetRegRawSimd(playout->I4_0, func(GetRegRawSimd(playout->I4_1), GetRegRawSimd(playout->I4_2), 4, lanes)); \
  1842. break; \
  1843. }
  1844. #define PROCESS_SIMD_I4_1I4toI4_1(name, func) PROCESS_SIMD_I4_1I4toI4_1_COMMON(name, func,)
  1845. // i8swizzle
  1846. #define PROCESS_SIMD_I8_1I8toI8_1_COMMON(name, func, suffix) \
  1847. case OpCodeAsmJs::name: \
  1848. { \
  1849. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_2Int8, suffix); \
  1850. uint32 lanes[8]; \
  1851. lanes[0] = GetRegRawInt(playout->I2); lanes[1] = GetRegRawInt(playout->I3); \
  1852. lanes[2] = GetRegRawInt(playout->I4); lanes[3] = GetRegRawInt(playout->I5); \
  1853. lanes[4] = GetRegRawInt(playout->I6); lanes[5] = GetRegRawInt(playout->I7); \
  1854. lanes[6] = GetRegRawInt(playout->I8); lanes[7] = GetRegRawInt(playout->I9); \
  1855. SetRegRawSimd(playout->I8_0, func(GetRegRawSimd(playout->I8_1), GetRegRawSimd(playout->I8_1), 8, lanes)); \
  1856. break; \
  1857. }
  1858. #define PROCESS_SIMD_I8_1I8toI8_1(name, func) PROCESS_SIMD_I8_1I8toI8_1_COMMON(name, func,)
  1859. // i8shuffle
  1860. #define PROCESS_SIMD_I8_2I8toI8_1_COMMON(name, func, suffix) \
  1861. case OpCodeAsmJs::name: \
  1862. { \
  1863. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_3Int8, suffix); \
  1864. uint32 lanes[8]; \
  1865. lanes[0] = GetRegRawInt(playout->I3); lanes[1] = GetRegRawInt(playout->I4); \
  1866. lanes[2] = GetRegRawInt(playout->I5); lanes[3] = GetRegRawInt(playout->I6); \
  1867. lanes[4] = GetRegRawInt(playout->I7); lanes[5] = GetRegRawInt(playout->I8); \
  1868. lanes[6] = GetRegRawInt(playout->I9); lanes[7] = GetRegRawInt(playout->I10); \
  1869. SetRegRawSimd(playout->I8_0, func(GetRegRawSimd(playout->I8_1), GetRegRawSimd(playout->I8_2), 8, lanes)); \
  1870. break; \
  1871. }
  1872. #define PROCESS_SIMD_I8_1I8toI8_1(name, func) PROCESS_SIMD_I8_1I8toI8_1_COMMON(name, func,)
  1873. // u4swizzle
  1874. #define PROCESS_SIMD_U4_1I4toU4_1_COMMON(name, func, suffix) \
  1875. case OpCodeAsmJs::name: \
  1876. { \
  1877. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_2Int4, suffix); \
  1878. uint32 lanes[4]; \
  1879. lanes[0] = GetRegRawInt(playout->I2); lanes[1] = GetRegRawInt(playout->I3); \
  1880. lanes[2] = GetRegRawInt(playout->I4); lanes[3] = GetRegRawInt(playout->I5); \
  1881. SetRegRawSimd(playout->U4_0, func(GetRegRawSimd(playout->U4_1), GetRegRawSimd(playout->U4_1), 4, lanes)); \
  1882. break; \
  1883. }
  1884. #define PROCESS_SIMD_U4_1I4toU4_1(name, func) PROCESS_SIMD_U4_1I4toU4_1_COMMON(name, func,)
  1885. // u4shuffle
  1886. #define PROCESS_SIMD_U4_2I4toU4_1_COMMON(name, func, suffix) \
  1887. case OpCodeAsmJs::name: \
  1888. { \
  1889. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_3Int4, suffix); \
  1890. uint32 lanes[4]; \
  1891. lanes[0] = GetRegRawInt(playout->I3); lanes[1] = GetRegRawInt(playout->I4); \
  1892. lanes[2] = GetRegRawInt(playout->I5); lanes[3] = GetRegRawInt(playout->I6); \
  1893. SetRegRawSimd(playout->U4_0, func(GetRegRawSimd(playout->U4_1), GetRegRawSimd(playout->U4_2), 4, lanes)); \
  1894. break; \
  1895. }
  1896. #define PROCESS_SIMD_U4_1I4toU4_1(name, func) PROCESS_SIMD_U4_1I4toU4_1_COMMON(name, func,)
  1897. // u8swizzle
  1898. #define PROCESS_SIMD_U8_1I8toU8_1_COMMON(name, func, suffix) \
  1899. case OpCodeAsmJs::name: \
  1900. { \
  1901. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_2Int8, suffix); \
  1902. uint32 lanes[8]; \
  1903. lanes[0] = GetRegRawInt(playout->I2); lanes[1] = GetRegRawInt(playout->I3); \
  1904. lanes[2] = GetRegRawInt(playout->I4); lanes[3] = GetRegRawInt(playout->I5); \
  1905. lanes[4] = GetRegRawInt(playout->I6); lanes[5] = GetRegRawInt(playout->I7); \
  1906. lanes[6] = GetRegRawInt(playout->I8); lanes[7] = GetRegRawInt(playout->I9); \
  1907. SetRegRawSimd(playout->U8_0, func(GetRegRawSimd(playout->U8_1), GetRegRawSimd(playout->U8_1), 8, lanes)); \
  1908. break; \
  1909. }
  1910. #define PROCESS_SIMD_U8_1I8toU8_1(name, func) PROCESS_SIMD_U8_1I8toU8_1_COMMON(name, func,)
  1911. // u8shuffle
  1912. #define PROCESS_SIMD_U8_2I8toU8_1_COMMON(name, func, suffix) \
  1913. case OpCodeAsmJs::name: \
  1914. { \
  1915. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_3Int8, suffix); \
  1916. uint32 lanes[8]; \
  1917. lanes[0] = GetRegRawInt(playout->I3); lanes[1] = GetRegRawInt(playout->I4); \
  1918. lanes[2] = GetRegRawInt(playout->I5); lanes[3] = GetRegRawInt(playout->I6); \
  1919. lanes[4] = GetRegRawInt(playout->I7); lanes[5] = GetRegRawInt(playout->I8); \
  1920. lanes[6] = GetRegRawInt(playout->I9); lanes[7] = GetRegRawInt(playout->I10); \
  1921. SetRegRawSimd(playout->U8_0, func(GetRegRawSimd(playout->U8_1), GetRegRawSimd(playout->U8_2), 8, lanes)); \
  1922. break; \
  1923. }
  1924. #define PROCESS_SIMD_U8_1I8toU8_1(name, func) PROCESS_SIMD_U8_1I8toU8_1_COMMON(name, func,)
  1925. // u16swizzle
  1926. #define PROCESS_SIMD_U16_1I16toU16_1_COMMON(name, func, suffix) \
  1927. case OpCodeAsmJs::name: \
  1928. { \
  1929. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_2Int16, suffix); \
  1930. uint32 lanes[16]; \
  1931. lanes[0] = GetRegRawInt(playout->I2); lanes[1] = GetRegRawInt(playout->I3); \
  1932. lanes[2] = GetRegRawInt(playout->I4); lanes[3] = GetRegRawInt(playout->I5); \
  1933. lanes[4] = GetRegRawInt(playout->I6); lanes[5] = GetRegRawInt(playout->I7); \
  1934. lanes[6] = GetRegRawInt(playout->I8); lanes[7] = GetRegRawInt(playout->I9); \
  1935. lanes[8] = GetRegRawInt(playout->I10); lanes[9] = GetRegRawInt(playout->I11); \
  1936. lanes[10] = GetRegRawInt(playout->I12); lanes[11] = GetRegRawInt(playout->I13); \
  1937. lanes[12] = GetRegRawInt(playout->I14); lanes[13] = GetRegRawInt(playout->I15); \
  1938. lanes[14] = GetRegRawInt(playout->I16); lanes[15] = GetRegRawInt(playout->I17); \
  1939. SetRegRawSimd(playout->U16_0, func(GetRegRawSimd(playout->U16_1), GetRegRawSimd(playout->U16_1), 16,lanes)); \
  1940. break; \
  1941. }
  1942. #define PROCESS_SIMD_U16_1I16toU16_1(name, func) PROCESS_SIMD_U16_1I16toU16_1_COMMON(name, func,)
  1943. // u16shuffle
  1944. #define PROCESS_SIMD_U16_2I16toU16_1_COMMON(name, func, suffix) \
  1945. case OpCodeAsmJs::name: \
  1946. { \
  1947. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_3Int16, suffix); \
  1948. uint32 lanes[16]; \
  1949. lanes[0] = GetRegRawInt(playout->I3); lanes[1] = GetRegRawInt(playout->I4); \
  1950. lanes[2] = GetRegRawInt(playout->I5); lanes[3] = GetRegRawInt(playout->I6); \
  1951. lanes[4] = GetRegRawInt(playout->I7); lanes[5] = GetRegRawInt(playout->I8); \
  1952. lanes[6] = GetRegRawInt(playout->I9); lanes[7] = GetRegRawInt(playout->I10); \
  1953. lanes[8] = GetRegRawInt(playout->I11); lanes[9] = GetRegRawInt(playout->I12); \
  1954. lanes[10] = GetRegRawInt(playout->I13); lanes[11] = GetRegRawInt(playout->I14); \
  1955. lanes[12] = GetRegRawInt(playout->I15); lanes[13] = GetRegRawInt(playout->I16); \
  1956. lanes[14] = GetRegRawInt(playout->I17); lanes[15] = GetRegRawInt(playout->I18); \
  1957. SetRegRawSimd(playout->U16_0, func(GetRegRawSimd(playout->U16_1), GetRegRawSimd(playout->U16_2), 16, lanes)); \
  1958. break; \
  1959. }
  1960. #define PROCESS_SIMD_U16_2I16toU16_1(name, func) PROCESS_SIMD_U16_2I16toU16_1_COMMON(name, func,)
  1961. // d2swizzle
  1962. #define PROCESS_SIMD_D2_1I2toD2_1_COMMON(name, func, suffix) \
  1963. case OpCodeAsmJs::name: \
  1964. { \
  1965. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_2Int2, suffix); \
  1966. SetRegRawSimd(playout->D2_0, func<2>(GetRegRawSimd(playout->D2_1), GetRegRawSimd(playout->D2_1), GetRegRawInt(playout->I2), GetRegRawInt(playout->I3), 0, 0)); \
  1967. break; \
  1968. }
  1969. #define PROCESS_SIMD_D2_1I2toD2_1(name, func) PROCESS_SIMD_D2_1I2toD2_1_COMMON(name, func,)
  1970. // d2shuffle
  1971. #define PROCESS_SIMD_D2_2I2toD2_1_COMMON(name, func, suffix) \
  1972. case OpCodeAsmJs::name: \
  1973. { \
  1974. PROCESS_READ_LAYOUT_ASMJS(name, Float64x2_3Int2, suffix); \
  1975. SetRegRawSimd(playout->D2_0, func<2>(GetRegRawSimd(playout->D2_1), GetRegRawSimd(playout->D2_2), GetRegRawInt(playout->I3), GetRegRawInt(playout->I4), 0, 0)); \
  1976. break; \
  1977. }
  1978. #define PROCESS_SIMD_D2_2I4toD2_1(name, func) PROCESS_SIMD_D2_2I2toD2_1_COMMON(name, func,)
  1979. #define PROCESS_SIMD_I4_1I1toI4_1_COMMON(name, func, suffix) \
  1980. case OpCodeAsmJs::name: \
  1981. { \
  1982. PROCESS_READ_LAYOUT_ASMJS(name, Int32x4_2Int1, suffix); \
  1983. SetRegRawSimd(playout->I4_0, func(GetRegRawSimd(playout->I4_1), GetRegRawInt(playout->I2))); \
  1984. break; \
  1985. }
  1986. #define PROCESS_SIMD_I4_1I1toI4_1(name, func) PROCESS_SIMD_I4_1I1toI4_1_COMMON(name, func,)
  1987. #define PROCESS_SIMD_I8_1I1toI8_1_COMMON(name, func, suffix) \
  1988. case OpCodeAsmJs::name: \
  1989. { \
  1990. PROCESS_READ_LAYOUT_ASMJS(name, Int16x8_2Int1, suffix); \
  1991. SetRegRawSimd(playout->I8_0, func(GetRegRawSimd(playout->I8_1), GetRegRawInt(playout->I2))); \
  1992. break; \
  1993. }
  1994. #define PROCESS_SIMD_I8_1I1toI8_1(name, func) PROCESS_SIMD_I8_1I1toI8_1_COMMON(name, func,)
  1995. #define PROCESS_SIMD_I16_1I1toI16_1_COMMON(name, func, suffix) \
  1996. case OpCodeAsmJs::name: \
  1997. { \
  1998. PROCESS_READ_LAYOUT_ASMJS(name, Int8x16_2Int1, suffix); \
  1999. SetRegRawSimd(playout->I16_0, func(GetRegRawSimd(playout->I16_1), GetRegRawInt(playout->I2))); \
  2000. break; \
  2001. }
  2002. #define PROCESS_SIMD_I16_1I1toI16_1(name, func) PROCESS_SIMD_I16_1I1toI16_1_COMMON(name, func,)
  2003. #define PROCESS_SIMD_D2_1I1toD1_COMMON(name, func, suffix) \
  2004. case OpCodeAsmJs::name: \
  2005. { \
  2006. PROCESS_READ_LAYOUT_ASMJS(name, Double1Float64x2_1Int1, suffix); \
  2007. SetRegRawDouble(playout->D0, func(GetRegRawSimd(playout->D2_1), GetRegRawInt(playout->I2))); \
  2008. break; \
  2009. }
  2010. #define PROCESS_SIMD_D2_1I1toD1(name, func) PROCESS_SIMD_D2_1I1toD1_COMMON(name, func, )
  2011. #define PROCESS_SIMD_U4_1I1toU4_1_COMMON(name, func, suffix) \
  2012. case OpCodeAsmJs::name: \
  2013. { \
  2014. PROCESS_READ_LAYOUT_ASMJS(name, Uint32x4_2Int1, suffix); \
  2015. SetRegRawSimd(playout->U4_0, func(GetRegRawSimd(playout->U4_1), GetRegRawInt(playout->I2))); \
  2016. break; \
  2017. }
  2018. #define PROCESS_SIMD_U4_1I1toU4_1(name, func) PROCESS_SIMD_U4_1I1toU4_1_COMMON(name, func,)
  2019. #define PROCESS_SIMD_U8_1I1toU8_1_COMMON(name, func, suffix) \
  2020. case OpCodeAsmJs::name: \
  2021. { \
  2022. PROCESS_READ_LAYOUT_ASMJS(name, Uint16x8_2Int1, suffix); \
  2023. SetRegRawSimd(playout->U8_0, func(GetRegRawSimd(playout->U8_1), GetRegRawInt(playout->I2))); \
  2024. break; \
  2025. }
  2026. #define PROCESS_SIMD_U8_1I1toU8_1(name, func) PROCESS_SIMD_U8_1I1toU8_1_COMMON(name, func,)
  2027. #define PROCESS_SIMD_U16_1I1toU16_1_COMMON(name, func, suffix) \
  2028. case OpCodeAsmJs::name: \
  2029. { \
  2030. PROCESS_READ_LAYOUT_ASMJS(name, Uint8x16_2Int1, suffix); \
  2031. SetRegRawSimd(playout->U16_0, func(GetRegRawSimd(playout->U16_1), GetRegRawInt(playout->I2))); \
  2032. break; \
  2033. }
  2034. #define PROCESS_SIMD_U16_1I1toU16_1(name, func) PROCESS_SIMD_U16_1I1toU16_1_COMMON(name, func,)
  2035. #endif