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@@ -49,23 +49,23 @@ bool LowererMD::Simd128TryLowerMappedInstruction(IR::Instr *instr)
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{
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case Js::OpCode::Simd128_Abs_F4:
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Assert(opcode == Js::OpCode::ANDPS);
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- instr->SetSrc2(IR::MemRefOpnd::New((void*)&X86_ABS_MASK_F4, instr->GetSrc1()->GetType(), m_func));
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+ instr->SetSrc2(IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AbsMaskF4Addr(), instr->GetSrc1()->GetType(), m_func));
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break;
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#if 0
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case Js::OpCode::Simd128_Abs_D2:
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Assert(opcode == Js::OpCode::ANDPD);
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- instr->SetSrc2(IR::MemRefOpnd::New((void*)&X86_ABS_MASK_D2, instr->GetSrc1()->GetType(), m_func));
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+ instr->SetSrc2(IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AbsMaskD2Addr(), instr->GetSrc1()->GetType(), m_func));
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break;
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#endif // 0
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case Js::OpCode::Simd128_Neg_F4:
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Assert(opcode == Js::OpCode::XORPS);
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- instr->SetSrc2(IR::MemRefOpnd::New((void*)&X86_NEG_MASK_F4, instr->GetSrc1()->GetType(), m_func));
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+ instr->SetSrc2(IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86NegMaskF4Addr(), instr->GetSrc1()->GetType(), m_func));
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break;
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#if 0
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case Js::OpCode::Simd128_Neg_D2:
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Assert(opcode == Js::OpCode::XORPS);
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- instr->SetSrc2(IR::MemRefOpnd::New((void*)&X86_NEG_MASK_D2, instr->GetSrc1()->GetType(), m_func));
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+ instr->SetSrc2(IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86NegMaskD2Addr(), instr->GetSrc1()->GetType(), m_func));
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break;
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#endif // 0
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@@ -79,7 +79,7 @@ bool LowererMD::Simd128TryLowerMappedInstruction(IR::Instr *instr)
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case Js::OpCode::Simd128_Not_B8:
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case Js::OpCode::Simd128_Not_B16:
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Assert(opcode == Js::OpCode::XORPS);
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- instr->SetSrc2(IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES, instr->GetSrc1()->GetType(), m_func));
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+ instr->SetSrc2(IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesAddr(), instr->GetSrc1()->GetType(), m_func));
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break;
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case Js::OpCode::Simd128_Gt_F4:
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//case Js::OpCode::Simd128_Gt_D2:
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@@ -373,12 +373,34 @@ IR::Instr* LowererMD::Simd128LoadConst(IR::Instr* instr)
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AsmJsSIMDValue value = instr->GetSrc1()->AsSimd128ConstOpnd()->m_value;
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// MOVUPS dst, [const]
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- AsmJsSIMDValue *pValue = NativeCodeDataNewNoFixup(instr->m_func->GetNativeCodeDataAllocator(), AsmJsSIMDValue);
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- pValue->SetValue(value);
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- IR::Opnd * opnd = IR::MemRefOpnd::New((void *)pValue, instr->GetDst()->GetType(), instr->m_func);
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- instr->ReplaceSrc1(opnd);
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+
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+ void *pValue = NativeCodeDataNewNoFixup(this->m_func->GetNativeCodeDataAllocator(), SIMDType<DataDesc_LowererMD_Simd128LoadConst>, value);
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+ IR::Opnd * simdRef;
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+ if (!m_func->IsOOPJIT())
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+ {
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+ simdRef = IR::MemRefOpnd::New((void *)pValue, instr->GetDst()->GetType(), instr->m_func);
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+ }
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+ else
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+ {
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+ int offset = NativeCodeData::GetDataTotalOffset(pValue);
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+ IR::RegOpnd * addressRegOpnd = IR::RegOpnd::New(TyMachPtr, m_func);
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+
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+ Lowerer::InsertMove(
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+ addressRegOpnd,
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+ IR::MemRefOpnd::New((void*)m_func->GetWorkItem()->GetWorkItemData()->nativeDataAddr, TyMachPtr, m_func, IR::AddrOpndKindDynamicNativeCodeDataRef),
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+ instr);
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+
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+ simdRef = IR::IndirOpnd::New(addressRegOpnd, offset, TyMachDouble,
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+#if DBG
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+ NativeCodeData::GetDataDescription(pValue, m_func->m_alloc),
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+#endif
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+ m_func);
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+ }
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+
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+ instr->ReplaceSrc1(simdRef);
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instr->m_opcode = LowererMDArch::GetAssignOp(instr->GetDst()->GetType());
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Legalize(instr);
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+
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return instr->m_prev;
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}
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@@ -388,11 +410,11 @@ IR::Instr* LowererMD::Simd128CanonicalizeToBools(IR::Instr* instr, const Js::OpC
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instr->m_opcode == Js::OpCode::Simd128_ReplaceLane_B4 || instr->m_opcode == Js::OpCode::Simd128_ReplaceLane_B8 || instr->m_opcode == Js::OpCode::Simd128_ReplaceLane_B16);
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IR::Instr *pInstr;
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//dst = cmpOpcode dst, X86_ALL_ZEROS
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- pInstr = IR::Instr::New(cmpOpcode, &dstOpnd, &dstOpnd, IR::MemRefOpnd::New((void*)&X86_ALL_ZEROS, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(cmpOpcode, &dstOpnd, &dstOpnd, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllZerosAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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// dst = PANDN dst, X86_ALL_NEG_ONES
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- pInstr = IR::Instr::New(Js::OpCode::PANDN, &dstOpnd, &dstOpnd, IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PANDN, &dstOpnd, &dstOpnd, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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return instr;
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@@ -438,12 +460,12 @@ IR::Instr* LowererMD::Simd128LowerConstructor_16(IR::Instr *instr)
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//Simd128_IntsToI16/U16/B16
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Assert(instr->m_opcode == Js::OpCode::Simd128_IntsToU16 || instr->m_opcode == Js::OpCode::Simd128_IntsToI16 || instr->m_opcode == Js::OpCode::Simd128_IntsToB16);
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SList<IR::Opnd*> *args = Simd128GetExtendedArgs(instr);
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- uint8 *tempSIMD = (uint8*)(instr->m_func->GetScriptContext()->GetThreadContext()->GetSimdTempArea());
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+ intptr_t tempSIMD = m_func->GetThreadContextInfo()->GetSimdTempAreaAddr(0);
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#if DBG
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// using only one SIMD temp
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- intptr_t endAddrSIMD = (intptr_t)(tempSIMD + sizeof(X86SIMDValue));
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+ intptr_t endAddrSIMD = tempSIMD + sizeof(X86SIMDValue);
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#endif
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- void * address;
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+ intptr_t address;
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IR::Instr * newInstr;
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Assert(args->Count() == 17);
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@@ -457,17 +479,17 @@ IR::Instr* LowererMD::Simd128LowerConstructor_16(IR::Instr *instr)
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srcs[i] = EnregisterIntConst(instr, srcs[i], TyInt8);
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Assert(srcs[i]->GetType() == TyInt8 && srcs[i]->IsRegOpnd());
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- address = (void*)(tempSIMD + i);
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+ address = tempSIMD + i;
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// check for buffer overrun
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Assert((intptr_t)address < endAddrSIMD);
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// MOV [temp + i], src[i] (TyInt8)
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- newInstr = IR::Instr::New(Js::OpCode::MOV, IR::MemRefOpnd::New((void*)(tempSIMD + i), TyInt8, m_func), srcs[i], m_func);
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+ newInstr = IR::Instr::New(Js::OpCode::MOV, IR::MemRefOpnd::New(tempSIMD + i, TyInt8, m_func), srcs[i], m_func);
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instr->InsertBefore(newInstr);
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Legalize(newInstr);
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i++;
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}
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// MOVUPS dst, [temp]
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- newInstr = IR::Instr::New(Js::OpCode::MOVUPS, dst, IR::MemRefOpnd::New((void*)(tempSIMD), TySimd128U16, m_func), m_func);
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+ newInstr = IR::Instr::New(Js::OpCode::MOVUPS, dst, IR::MemRefOpnd::New(tempSIMD, TySimd128U16, m_func), m_func);
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instr->InsertBefore(newInstr);
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Legalize(newInstr);
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@@ -874,7 +896,7 @@ IR::Instr* LowererMD::Simd128LowerSplat(IR::Instr *instr)
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//JEQ $labelZero
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instr->InsertBefore(IR::BranchInstr::New(Js::OpCode::JEQ, labelZero, m_func));
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// MOVAPS dst, xmmword ptr[X86_ALL_NEG_ONES]
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- pInstr = IR::Instr::New(Js::OpCode::MOVAPS, dst, IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::MOVAPS, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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// JMP $labelDone
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@@ -933,7 +955,7 @@ IR::Instr* LowererMD::Simd128LowerRcp(IR::Instr *instr, bool removeInstr)
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#endif // 0
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IR::RegOpnd* tmp = IR::RegOpnd::New(src1->GetType(), m_func);
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- IR::Instr* movInstr = IR::Instr::New(Js::OpCode::MOVAPS, tmp, IR::MemRefOpnd::New((void*)(&X86_ALL_ONES_F4), src1->GetType(), m_func), m_func);
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+ IR::Instr* movInstr = IR::Instr::New(Js::OpCode::MOVAPS, tmp, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllOnesF4Addr(), src1->GetType(), m_func), m_func);
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instr->InsertBefore(movInstr);
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Legalize(movInstr);
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@@ -1072,7 +1094,7 @@ IR::Instr* LowererMD::Simd128LowerNeg(IR::Instr *instr)
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instr->InsertBefore(pInstr);
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// PANDN dst, dst, 0xfff...f
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- pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES, src1->GetType(), m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesAddr(), src1->GetType(), m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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@@ -1175,7 +1197,7 @@ IR::Instr* LowererMD::Simd128LowerMulI16(IR::Instr *instr)
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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//PAND temp1 {0x00ff00ff00ff00ff00ff00ff00ff00ff} :To zero out bytes 1,3,5...
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- pInstr = IR::Instr::New(Js::OpCode::PAND, temp1, temp1, IR::MemRefOpnd::New((void*)&X86_LOWBYTES_MASK, simdType, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PAND, temp1, temp1, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86LowBytesMaskAddr(), simdType, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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//PSRLW src1, 8
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@@ -1296,7 +1318,7 @@ IR::Instr* LowererMD::Simd128LowerShift(IR::Instr *instr)
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pInstr = IR::Instr::New(Js::OpCode::MOVAPS, dst, src1, m_func);
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instr->InsertBefore(pInstr);
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// PAND tmp1, [X86_HIGHBYTES_MASK]
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- pInstr = IR::Instr::New(Js::OpCode::PAND, tmp1, tmp1, IR::MemRefOpnd::New((void*)&X86_HIGHBYTES_MASK, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PAND, tmp1, tmp1, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86HighBytesMaskAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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// PSLLW tmp1, tmp0
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@@ -1308,7 +1330,7 @@ IR::Instr* LowererMD::Simd128LowerShift(IR::Instr *instr)
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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// PAND dst, [X86_LOWBYTES_MASK]
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- pInstr = IR::Instr::New(Js::OpCode::PAND, dst, dst, IR::MemRefOpnd::New((void*)&X86_LOWBYTES_MASK, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PAND, dst, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86LowBytesMaskAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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// POR dst, tmp1
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@@ -1332,13 +1354,13 @@ IR::Instr* LowererMD::Simd128LowerShift(IR::Instr *instr)
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// PSRAW dst, tmp0
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instr->InsertBefore(IR::Instr::New(Js::OpCode::PSRAW, dst, dst, tmp2, m_func));
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// PAND dst, [X86_LOWBYTES_MASK]
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- pInstr = IR::Instr::New(Js::OpCode::PAND, dst, dst, IR::MemRefOpnd::New((void*)&X86_LOWBYTES_MASK, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PAND, dst, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86LowBytesMaskAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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// PSRAW tmp1, tmp0
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instr->InsertBefore(IR::Instr::New(Js::OpCode::PSRAW, tmp1, tmp1, tmp0, m_func));
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// PAND tmp1, [X86_HIGHBYTES_MASK]
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- pInstr = IR::Instr::New(Js::OpCode::PAND, tmp1, tmp1, IR::MemRefOpnd::New((void*)&X86_HIGHBYTES_MASK, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PAND, tmp1, tmp1, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86HighBytesMaskAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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// POR dst, tmp1
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@@ -1454,22 +1476,21 @@ IR::Instr* LowererMD::SIMD128LowerReplaceLane_16(IR::Instr* instr)
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Assert(lane >= 0 && lane < 16);
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IR::Opnd* laneValue = EnregisterIntConst(instr, src3, TyInt8);
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- uint8 *tempSIMD = (uint8*)(instr->m_func->GetScriptContext()->GetThreadContext()->GetSimdTempArea());
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+ intptr_t tempSIMD = m_func->GetThreadContextInfo()->GetSimdTempAreaAddr(0);
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#if DBG
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// using only one SIMD temp
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- intptr_t endAddrSIMD = (intptr_t) (tempSIMD + sizeof(X86SIMDValue));
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+ intptr_t endAddrSIMD = tempSIMD + sizeof(X86SIMDValue);
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#endif
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- void *address = nullptr;
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Assert(instr->m_opcode == Js::OpCode::Simd128_ReplaceLane_I16 || instr->m_opcode == Js::OpCode::Simd128_ReplaceLane_U16 || instr->m_opcode == Js::OpCode::Simd128_ReplaceLane_B16);
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// MOVUPS [temp], src1
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- address = (void*)tempSIMD;
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+ intptr_t address = tempSIMD;
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newInstr = IR::Instr::New(Js::OpCode::MOVUPS, IR::MemRefOpnd::New(address, TySimd128I16, m_func), src1, m_func);
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instr->InsertBefore(newInstr);
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Legalize(newInstr);
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// MOV [temp+offset], laneValue
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- address = (void*)(tempSIMD + lane);
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+ address = tempSIMD + lane;
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// check for buffer overrun
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Assert((intptr_t)address < endAddrSIMD);
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newInstr = IR::Instr::New(Js::OpCode::MOV, IR::MemRefOpnd::New(address, TyInt8, m_func), laneValue, m_func);
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@@ -1477,7 +1498,7 @@ IR::Instr* LowererMD::SIMD128LowerReplaceLane_16(IR::Instr* instr)
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Legalize(newInstr);
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// MOVUPS dst, [temp]
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- address = (void*)tempSIMD;
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+ address = tempSIMD;
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newInstr = IR::Instr::New(Js::OpCode::MOVUPS, dst, IR::MemRefOpnd::New(address, TySimd128I16, m_func), m_func);
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instr->InsertBefore(newInstr);
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Legalize(newInstr);
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@@ -1757,7 +1778,7 @@ IR::Instr* LowererMD::Simd128LowerShuffle_4(IR::Instr* instr)
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break;
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}
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}
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- IR::MemRefOpnd * laneMask = IR::MemRefOpnd::New((void*)&X86_4LANES_MASKS[minorityLane], dst->GetType(), m_func);
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+ IR::MemRefOpnd * laneMask = IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86FourLanesMaskAddr(minorityLane), dst->GetType(), m_func);
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InsertShufps(lanes, temp1, majSrc, majSrc, instr);
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InsertShufps(lanes, temp2, minSrc, minSrc, instr);
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@@ -1790,10 +1811,9 @@ IR::Instr* LowererMD::Simd128LowerShuffle(IR::Instr* instr)
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uint8 lanes[16], laneCount = 0, scale = 1;
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bool isShuffle = false;
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IRType laneType = TyInt16;
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- X86SIMDValue * const tempSIMD = (instr->m_func->GetScriptContext()->GetThreadContext()->GetSimdTempArea());
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- uint8 *temp1SIMD = (uint8 *) (&tempSIMD[0]);
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- uint8 *temp2SIMD = (uint8 *) (&tempSIMD[1]);
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- uint8 *dstSIMD = (uint8 *) (&tempSIMD[2]);
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+ intptr_t temp1SIMD = m_func->GetThreadContextInfo()->GetSimdTempAreaAddr(0);
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+ intptr_t temp2SIMD = m_func->GetThreadContextInfo()->GetSimdTempAreaAddr(1);
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+ intptr_t dstSIMD = m_func->GetThreadContextInfo()->GetSimdTempAreaAddr(2);
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#if DBG
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intptr_t endAddrSIMD = (intptr_t)(temp1SIMD + sizeof(X86SIMDValue) * SIMD_TEMP_SIZE);
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#endif
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@@ -1922,7 +1942,7 @@ IR::Instr* LowererMD::Simd128LowerNotEqual(IR::Instr* instr)
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Legalize(pInstr);
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// dst = PANDN dst, X86_ALL_NEG_ONES
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- pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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//MakeDstEquSrc1(pInstr);
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Legalize(pInstr);
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@@ -1949,19 +1969,19 @@ IR::Instr* LowererMD::Simd128LowerLessThan(IR::Instr* instr)
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IR::RegOpnd* tmpa = IR::RegOpnd::New(src1->GetType(), m_func);
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IR::RegOpnd* tmpb = IR::RegOpnd::New(src1->GetType(), m_func);
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- IR::MemRefOpnd* signBits = IR::MemRefOpnd::New((void*)&X86_DWORD_SIGNBITS, TySimd128I4, m_func);
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+ IR::MemRefOpnd* signBits = IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86DoubleWordSignBitsAddr(), TySimd128I4, m_func);
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IR::RegOpnd * mask = IR::RegOpnd::New(TySimd128I4, m_func);
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Js::OpCode cmpOpcode = Js::OpCode::PCMPGTD;
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if (instr->m_opcode == Js::OpCode::Simd128_Lt_U8 || instr->m_opcode == Js::OpCode::Simd128_GtEq_U8)
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{
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cmpOpcode = Js::OpCode::PCMPGTW;
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- signBits = IR::MemRefOpnd::New((void*)&X86_WORD_SIGNBITS, TySimd128I4, m_func);
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+ signBits = IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86WordSignBitsAddr(), TySimd128I4, m_func);
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}
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else if (instr->m_opcode == Js::OpCode::Simd128_Lt_U16 || instr->m_opcode == Js::OpCode::Simd128_GtEq_U16)
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{
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cmpOpcode = Js::OpCode::PCMPGTB;
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- signBits = IR::MemRefOpnd::New((void*)&X86_BYTE_SIGNBITS, TySimd128I4, m_func);
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+ signBits = IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86ByteSignBitsAddr(), TySimd128I4, m_func);
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}
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// MOVUPS mask, [signBits]
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@@ -1989,7 +2009,7 @@ IR::Instr* LowererMD::Simd128LowerLessThan(IR::Instr* instr)
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// for SIMD unsigned int, greaterThanOrEqual == lessThan + Not
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// dst = PANDN dst, X86_ALL_NEG_ONES
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// MOVUPS mask, [allNegOnes]
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- pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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}
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@@ -2038,7 +2058,7 @@ IR::Instr* LowererMD::Simd128LowerLessThanOrEqual(IR::Instr* instr)
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Legalize(pInstr);
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// dst = pandn dst, xmmword ptr[X86_ALL_NEG_ONES]
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- pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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}
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@@ -2062,15 +2082,15 @@ IR::Instr* LowererMD::Simd128LowerLessThanOrEqual(IR::Instr* instr)
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else if (instr->m_opcode == Js::OpCode::Simd128_LtEq_U4 || instr->m_opcode == Js::OpCode::Simd128_LtEq_U8 || instr->m_opcode == Js::OpCode::Simd128_LtEq_U16 ||
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instr->m_opcode == Js::OpCode::Simd128_Gt_U4 || instr->m_opcode == Js::OpCode::Simd128_Gt_U8 || instr->m_opcode == Js::OpCode::Simd128_Gt_U16)
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{
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- IR::MemRefOpnd* signBits = IR::MemRefOpnd::New((void*)&X86_DWORD_SIGNBITS, TySimd128I4, m_func);
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+ IR::MemRefOpnd* signBits = IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86DoubleWordSignBitsAddr(), TySimd128I4, m_func);
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IR::RegOpnd * mask = IR::RegOpnd::New(TySimd128I4, m_func);
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if (instr->m_opcode == Js::OpCode::Simd128_LtEq_U8 || instr->m_opcode == Js::OpCode::Simd128_Gt_U8)
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{
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- signBits = IR::MemRefOpnd::New((void*)&X86_WORD_SIGNBITS, TySimd128I4, m_func);
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+ signBits = IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86WordSignBitsAddr(), TySimd128I4, m_func);
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}
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else if (instr->m_opcode == Js::OpCode::Simd128_LtEq_U16 || instr->m_opcode == Js::OpCode::Simd128_Gt_U16)
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{
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- signBits = IR::MemRefOpnd::New((void*)&X86_BYTE_SIGNBITS, TySimd128I4, m_func);
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+ signBits = IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86ByteSignBitsAddr(), TySimd128I4, m_func);
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}
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// MOVUPS mask, [signBits]
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pInstr = IR::Instr::New(Js::OpCode::MOVUPS, mask, signBits, m_func);
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@@ -2104,7 +2124,7 @@ IR::Instr* LowererMD::Simd128LowerLessThanOrEqual(IR::Instr* instr)
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if (instr->m_opcode == Js::OpCode::Simd128_Gt_U4 || instr->m_opcode == Js::OpCode::Simd128_Gt_U8 || instr->m_opcode == Js::OpCode::Simd128_Gt_U16)
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{ // for SIMD unsigned int, greaterThan == lessThanOrEqual + Not
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// dst = PANDN dst, X86_ALL_NEG_ONES
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- pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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@@ -2137,7 +2157,7 @@ IR::Instr* LowererMD::Simd128LowerGreaterThanOrEqual(IR::Instr* instr)
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Legalize(pInstr);
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// dst = pandn dst, xmmword ptr[X86_ALL_NEG_ONES]
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- pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES, TySimd128I4, m_func), m_func);
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+ pInstr = IR::Instr::New(Js::OpCode::PANDN, dst, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesAddr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(pInstr);
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Legalize(pInstr);
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}
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@@ -2346,7 +2366,7 @@ IR::Instr* LowererMD::Simd128LowerInt32x4FromFloat32x4(IR::Instr *instr)
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// JNE $doneLabel
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tmp = IR::RegOpnd::New(TySimd128I4, m_func);
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tmp2 = IR::RegOpnd::New(TySimd128I4, m_func);
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- newInstr = IR::Instr::New(Js::OpCode::MOVAPS, tmp2, IR::MemRefOpnd::New((void*)&X86_NEG_MASK_F4, TySimd128I4, m_func), m_func);
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+ newInstr = IR::Instr::New(Js::OpCode::MOVAPS, tmp2, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86NegMaskF4Addr(), TySimd128I4, m_func), m_func);
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insertInstr->InsertBefore(newInstr);
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Legalize(newInstr);
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newInstr = IR::Instr::New(Js::OpCode::PCMPEQD, tmp, dst, tmp2, m_func);
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@@ -2369,7 +2389,7 @@ IR::Instr* LowererMD::Simd128LowerInt32x4FromFloat32x4(IR::Instr *instr)
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// OR mask1, mask1, mask2
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// CMP mask1, 0
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// JNE $doneLabel
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- newInstr = IR::Instr::New(Js::OpCode::MOVAPS, tmp2, IR::MemRefOpnd::New((void*)&X86_TWO_31_F4, TySimd128I4, m_func), m_func);
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+ newInstr = IR::Instr::New(Js::OpCode::MOVAPS, tmp2, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86TwoPower31F4Addr(), TySimd128I4, m_func), m_func);
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insertInstr->InsertBefore(newInstr);
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Legalize(newInstr);
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newInstr = IR::Instr::New(Js::OpCode::CMPLEPS, tmp, tmp2, src, m_func);
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@@ -2377,7 +2397,7 @@ IR::Instr* LowererMD::Simd128LowerInt32x4FromFloat32x4(IR::Instr *instr)
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Legalize(newInstr);
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insertInstr->InsertBefore(IR::Instr::New(Js::OpCode::MOVMSKPS, mask1, tmp, m_func));
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- newInstr = IR::Instr::New(Js::OpCode::MOVAPS, tmp2, IR::MemRefOpnd::New((void*)&X86_NEG_TWO_31_F4, TySimd128I4, m_func), m_func);
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+ newInstr = IR::Instr::New(Js::OpCode::MOVAPS, tmp2, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86NegTwoPower31F4Addr(), TySimd128I4, m_func), m_func);
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insertInstr->InsertBefore(newInstr);
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Legalize(newInstr);
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@@ -2425,7 +2445,7 @@ IR::Instr* LowererMD::Simd128LowerUint32x4FromFloat32x4(IR::Instr *instr)
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// MOVMSKPS mask, tmp
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// CMP mask, 0
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// JNE $throwLabel
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- newInstr = IR::Instr::New(Js::OpCode::CMPLEPS, tmp, src, IR::MemRefOpnd::New((void*)&X86_ALL_NEG_ONES_F4, TySimd128I4, m_func), m_func);
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+ newInstr = IR::Instr::New(Js::OpCode::CMPLEPS, tmp, src, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllNegOnesF4Addr(), TySimd128I4, m_func), m_func);
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instr->InsertBefore(newInstr);
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Legalize(newInstr);
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@@ -2448,7 +2468,7 @@ IR::Instr* LowererMD::Simd128LowerUint32x4FromFloat32x4(IR::Instr *instr)
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// ANDPS two_31_f4_mask, tmp2 // tmp has f32(2^31) for lanes >= 2^31, 0 otherwise
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|
// SUBPS tmp2, two_31_f4_mask // subtract 2^31 from lanes >= 2^31, unchanged otherwise.
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// CVTTPS2DQ dst, tmp2
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- newInstr = IR::Instr::New(Js::OpCode::MOVAPS, two_31_f4_mask, IR::MemRefOpnd::New((void*)&X86_TWO_31_F4, TySimd128F4, m_func), m_func);
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+ newInstr = IR::Instr::New(Js::OpCode::MOVAPS, two_31_f4_mask, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86TwoPower31F4Addr(), TySimd128F4, m_func), m_func);
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instr->InsertBefore(newInstr);
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|
Legalize(newInstr);
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@@ -2473,7 +2493,7 @@ IR::Instr* LowererMD::Simd128LowerUint32x4FromFloat32x4(IR::Instr *instr)
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// MOVMSKPS mask, tmp
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// CMP mask, 0
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// JNE $throwLabel
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|
|
- newInstr = IR::Instr::New(Js::OpCode::PCMPEQD, tmp, dst, IR::MemRefOpnd::New((void*)&X86_NEG_MASK_F4, TySimd128I4, m_func), m_func);
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|
+ newInstr = IR::Instr::New(Js::OpCode::PCMPEQD, tmp, dst, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86NegMaskF4Addr(), TySimd128I4, m_func), m_func);
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|
instr->InsertBefore(newInstr);
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|
|
Legalize(newInstr);
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|
@@ -2498,7 +2518,7 @@ IR::Instr* LowererMD::Simd128LowerUint32x4FromFloat32x4(IR::Instr *instr)
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|
// ANDPS two_31_i4_mask, two_31_f4_mask
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|
|
// PADDD dst, dst, two_31_i4_mask
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|
|
// JMP $doneLabel
|
|
|
- newInstr = IR::Instr::New(Js::OpCode::MOVAPS, two_31_i4_mask, IR::MemRefOpnd::New((void*)&X86_TWO_31_I4, TySimd128I4, m_func), m_func);
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|
+ newInstr = IR::Instr::New(Js::OpCode::MOVAPS, two_31_i4_mask, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86TwoPower31I4Addr(), TySimd128I4, m_func), m_func);
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|
instr->InsertBefore(newInstr);
|
|
|
Legalize(newInstr);
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|
|
|
|
|
@@ -2542,7 +2562,7 @@ IR::Instr* LowererMD::Simd128LowerFloat32x4FromUint32x4(IR::Instr *instr)
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|
// find unsigned values above 2^31-1. Comparison is signed, so look for values < 0
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|
|
// MOVAPS zero, [X86_ALL_ZEROS]
|
|
|
- newInstr = IR::Instr::New(Js::OpCode::MOVAPS, zero, IR::MemRefOpnd::New((void*)&X86_ALL_ZEROS, TySimd128I4, m_func), m_func);
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|
+ newInstr = IR::Instr::New(Js::OpCode::MOVAPS, zero, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86AllZerosAddr(), TySimd128I4, m_func), m_func);
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|
instr->InsertBefore(newInstr);
|
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|
Legalize(newInstr);
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|
@@ -2553,7 +2573,7 @@ IR::Instr* LowererMD::Simd128LowerFloat32x4FromUint32x4(IR::Instr *instr)
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|
// temp1 has f32(2^32) for unsigned values above 2^31, 0 otherwise
|
|
|
// ANDPS tmp, tmp, [X86_TWO_32_F4]
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|
|
- newInstr = IR::Instr::New(Js::OpCode::ANDPS, tmp, tmp, IR::MemRefOpnd::New((void*)&X86_TWO_32_F4, TySimd128F4, m_func), m_func);
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|
+ newInstr = IR::Instr::New(Js::OpCode::ANDPS, tmp, tmp, IR::MemRefOpnd::New(m_func->GetThreadContextInfo()->GetX86TwoPower32F4Addr(), TySimd128F4, m_func), m_func);
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|
instr->InsertBefore(newInstr);
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|
|
Legalize(newInstr);
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Michael Holman